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40 résultats
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Multi Bit Upset detection and correction based on self-robust Non-Volatile C-elementIEDM: International Electron Devices Meeting, Dec 2018, San Francisco, United States. IEEE International Electron Devices Meeting, 2018
Poster de conférence
hal-01982795v1
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SEU mechanisms in spintronic devices: Critical parameters and basic effectsIEEE Transactions on Nuclear Science, 2021, 68 (8), pp.1533-1541. ⟨10.1109/TNS.2021.3080080⟩
Article dans une revue
hal-03252884v1
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Spin orbit torque non-volatile flip-flop for high speed and low energy applicationsIEEE Electron Device Letters, 2014, 35 (3), pp.408 - 410. ⟨10.1109/led.2013.2297397⟩
Article dans une revue
hal-03506992v1
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Ultra-fast and high-reliability SOT-MRAM: from cache replacement to normally-off computingIEEE Transactions on Multi-Scale Computing Systems, 2016, 2 (1), pp.49 - 60. ⟨10.1109/TMSCS.2015.2509963⟩
Article dans une revue
hal-01864485v1
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Self-Robust Non-Volatile C-element for Single Event Upset Enhanced ToleranceJNRDM 2019 - 21es Journées Nationales du Réseau Doctoral en Micro-nanoélectronique, Jun 2019, Montpellier, France
Communication dans un congrès
lirmm-02366116v1
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High speed and high-area efficiency non-volatile look-up table design based on magnetic tunnel junction2017 17th Non-Volatile Memory Technology Symposium (NVMTS), Aug 2017, Aachen, Germany. ⟨10.1109/NVMTS.2017.8171280⟩
Communication dans un congrès
hal-01864492v1
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Heavy-ion irradiation effects on advanced perpendicular anisotropy spin-transfer torque magnetic tunnel junctionIEEE Transactions on Nuclear Science, 2021, 68 (5), pp.588-596. ⟨10.1109/TNS.2021.3071257⟩
Article dans une revue
hal-03255402v1
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Beyond STT-MRAM, Spin Orbit Torque RAM SOT-MRAM for high speed and high reliability applicationsWeisheng Zhao; Guillaume Prenat. Spintronics-based Computing, Springer International Publishing, pp.145-157, 2015, 978-3-319-34661-8. ⟨10.1007/978-3-319-15180-9_4⟩
Chapitre d'ouvrage
hal-01976635v1
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Cellule mémoire volatile/non-volatileFrance, N° de brevet: FR1150402A. 2011
Brevet
lirmm-00861516v1
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High density SOT-MRAM memory array based on a single transistorNon-Volatile Memory Technology Symposium (NVMTS), Oct 2018, Sendai, Japan. ⟨10.1109/NVMTS.2018.8603114⟩
Communication dans un congrès
hal-01982792v1
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A universal spintronic technology based on Multifunctional Standardized StackDATE 2020 - 23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.394-399, ⟨10.23919/DATE48585.2020.9116321⟩
Communication dans un congrès
hal-03753403v1
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MemCork: Exploration of Hybrid Memory Architectures for Intermittent Computing at the EdgeVLSI-SoC 2022 - 30th IFIP/IEEE International Conference on Very Large Scale Integration, Oct 2022, Patras, Greece. pp.1-6, ⟨10.1109/VLSI-SoC54400.2022.9939630⟩
Communication dans un congrès
hal-03810018v1
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MRAM: from STT to SOT, for security and memoryXXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS), Nov 2018, Lyon, France
Communication dans un congrès
hal-01982788v1
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On Using Cell-Aware Methodology for SRAM Bit Cell TestingETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-4, ⟨10.1109/ETS56758.2023.10174118⟩
Communication dans un congrès
hal-04164704v1
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On Using Cell-Aware Models for Representing SRAM Architecture16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Communication dans un congrès
lirmm-03987914v1
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Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, Sapporo, Japan. pp.1-5, ⟨10.1109/ISCAS.2019.8702734⟩
Communication dans un congrès
hal-03753425v1
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Infrastructures for education, research and industry: CMOS and MEMS for BioMed12th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI'08), 2008, Orlando, United States
Communication dans un congrès
hal-00354286v1
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High performance Spin-Orbit-Torque (SOT) based non-volatile standard cell for hybrid CMOS/Magnetic ICsComputer Science and Information Technology, 2017, 5 (3), pp.91. ⟨10.13189/csit.2017.050301⟩
Article dans une revue
hal-01977160v1
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Real-time switching dynamics in STT-MRAMIEEE Journal of the Electron Devices Society, 2022, ⟨10.1109/jeds.2022.3185324⟩
Article dans une revue
hal-03708265v1
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Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power microcontrollersIEEE Access, 2019, 7, pp.58085-58093. ⟨10.1109/ACCESS.2019.2906942⟩
Article dans une revue
lirmm-02079679v1
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Ultra Compact Non-Volatile Flip-Flop for Low-Power Digital Circuits Based on Hybrid CMOS/Magnetic TechnologyPATMOS 2011 - 21st International Workshop on Power and Timing Modeling, Optimization, and Simulation, Sep 2011, Madrid, Spain. pp.83-91, ⟨10.1007/978-3-642-24154-3_9⟩
Communication dans un congrès
istex
lirmm-00616949v1
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Spin Orbit Torque memory for non-volatile microprocessor cachesW07 International Workshop on Emerging Memory Solutions - DATE 2016, Mar 2016, Dresden, Germany
Communication dans un congrès
hal-01864483v1
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MEMS fabrication at CMP: past and presentNova Science Publishers, Inc. MEMS: Technology, Fabrication Processes and Applications, Nova Science Publishers, Inc., 2009
Chapitre d'ouvrage
hal-00395259v1
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Infrastructures for mixed signals in biology and medicine14th IEEE Int. Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'08), Jun 2008, Vancouver, Canada. pp.1-4, ⟨10.1109/IMS3TW.2008.4581622⟩
Communication dans un congrès
hal-00346658v1
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Compact modeling of a magnetic tunnel junction based on spin orbit torqueIEEE Transactions on Magnetics, 2014, 50 (7), pp.1-8. ⟨10.1109/TMAG.2014.2305695⟩
Article dans une revue
hal-02010859v1
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Non Volatile MRAM-based Asynchronous PROCessor2021
Autre publication scientifique
lirmm-03179090v1
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From spintronic devices to hybrid CMOS/magnetic system on chipIFIP International Conference on Very Large Scale Integration (VLSI-SoC 2018), Oct 2018, Verona, Italy. pp.188-191, ⟨10.1109/VLSI-SoC.2018.8644875⟩
Communication dans un congrès
hal-01982791v1
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Volatile/non-volatile memory cellUnited States, Patent n° : US20140070844 A1. 2014
Brevet
lirmm-01688089v1
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Asynchronous Design for Harsh EnvironmentsASYNC: Asynchronous Circuits and Systems, May 2015, Montain View, CA, United States
Communication dans un congrès
lirmm-01250722v1
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InMRAM: Introductory course on Magnetic Random Access Memories for microelectronics students and engIneersEWME 2014: 10th European Workshop on Microelectronics Education, May 2014, Tallinn, Estonia. ⟨10.1109/EWME.2014.6877388⟩
Communication dans un congrès
hal-02059497v1
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