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Nanostructure engineering of epitaxial piezoelectric {\alpha}-quartz thin films on silicon

 Q. Zhang , D. Sánchez-Garcia , R. Desgarceaux , A. Gomez , P. Escofet-Majora , et al.
2022
Pré-publication, Document de travail hal-02290299v1
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Modelling and engineering of stress based controlled oxidation effects for silicon nanostructures patterning

 Xiang-Lei Han , Guilhem Larrieu , Christophe Krzeminski
Nanotechnology, 2013, 24 (49), pp.495301
Article dans une revue hal-00905392v1
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Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor

 Bruno Neckel Wesling , Marina Deng , Mukherjee Chhandak , Magali de Matos , Abhishek Kumar , et al.
Solid-State Electronics, 2022, 194, pp.108359. ⟨10.1016/j.sse.2022.108359⟩
Article dans une revue hal-03657781v1
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Vertical Silicon Nanowire Field Effect Transistors with Nanoscale Gate-All-Around

 Youssouf Guerfi , Guilhem Larrieu
Nanoscale Research Letters, 2016, 11, pp.210. ⟨10.1186/s11671-016-1396-7⟩
Article dans une revue hal-01942311v1
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A Logic Cell Design and routing Methodology Specific to VNWFET

 Arnaud Poittevin , Ian O'Connor , Cédric Marchand , Alberto Bosio , Cristell Maneux , et al.
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS), Jun 2022, Quebec City, Canada. pp.460-464, ⟨10.1109/NEWCAS52662.2022.9842100⟩
Communication dans un congrès hal-03864493v1
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Compact Modeling of 3D Vertical Junctionless Gate-allaround Silicon Nanowire Transistors Towards 3D Logic Design

 Mukherjee Chhandak , Arnaud Poittevin , Ian O'Connor , Guilhem Larrieu , Cristell Maneux
Solid-State Electronics, 2021, 183, pp.108125. ⟨10.1016/j.sse.2021.108125⟩
Article dans une revue hal-03429568v1
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Advanced contacts on 3D nanostructured channels for vertical transport gate-all-around transistors

 Guilhem Larrieu , Jonas Müller , Sylvain Pelloquin , Abhishek Kumar , Konstantinos Moustakas , et al.
21st International Workshop on Junction Technology (IWJT 2023), Jun 2023, Kyoto, Japan. pp.1-4, ⟨10.23919/IWJT59028.2023.10175172⟩
Communication dans un congrès hal-04189319v1

3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model

 Arnaud Poittevin , Chhandak Mukherjee , Ian O'Connor , Cristell Maneux , Guilhem Larrieu , et al.
VLSI-SoC: Design Trends, 621, Springer International Publishing, pp.301-321, 2021, IFIP Advances in Information and Communication Technology, ⟨10.1007/978-3-030-81641-4_14⟩
Chapitre d'ouvrage hal-03371673v1

Fano-Resonances in High Index Dielectric Nanowires for Directional Scattering

 Peter Wiecha , Aurelien Cuche , Houssem Kallel , Gérard Colas Des Francs , Aurélie Lecestre , et al.
Herausgeber: Kamenetskii, Eugene, Sadreev, Almas, Miroshnichenko, Andrey (Eds.). Fano Resonances in Optics and Microwaves: Physics and Applications, Springer, pp.283-310, 2018, 978-3-319-99730-8
Chapitre d'ouvrage hal-01850259v1

Why neuromorphic computing need novel 3D technologies? A view from FVLLMONTI European project consortium (Invited)

 Cristell Maneux , Mukherjee Chhandak , Marina Deng , Maeva Dubourg , Lucas Réveil , et al.
High Performance Embedded Architecture and Compilation, Computing Systems Week, (HiPEAC CSW) Autumn 2021, Oct 2021, Lyon, France
Communication dans un congrès hal-03408071v1
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Control of light emission of quantum emitters coupled to silicon nanoantenna using cylindrical vector beams

 Martin Montagnac , Yoann Brûlé , Aurélien Cuche , Jean-Marie Poumirol , Sébastien J Weber , et al.
Light: Science and Applications, 2023, 12 (1), pp.239. ⟨10.1038/s41377-023-01229-9⟩
Article dans une revue hal-04212490v1
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Probing the optical near-field interaction of Mie nanoresonators with atomically thin semiconductors

 Ana Estrada-Real , Ioannis Paradisanos , Peter Wiecha , Jean-Marie Poumirol , Aurelien Cuche , et al.
Communications Physics, 2023, 6 (1), pp.102. ⟨10.1038/s42005-023-01211-2⟩
Article dans une revue hal-03845142v1
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A combination of capillary and dielectrophoresis-driven assembly methods for wafer scale integration of carbon-nanotube-based nanocarpets

 Florent Seichepine , Sven Salomon , Maéva Collet , Samuel Guillon , Liviu Nicu , et al.
Nanotechnology, 2012, vol. 23, pp.1-7. ⟨10.1088/0957-4484/23/9/095303⟩
Article dans une revue istex hal-00832109v1

Nanowire based bioprobes for electrical monitoring of electrogenic cells

 Adrien Casanova , Luca Bettamin , Marie-Charline Blatché , Fabrice Mathieu , Daniel Gonzalez-Dunia , et al.
Journal of Physics: Condensed Matter, 2018, 30 (46), pp.464001. ⟨10.1088/1361-648X/aae5aa⟩
Article dans une revue hal-01942304v1
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Circuit Design Flow dedicated to 3D vertical nanowire FET

 Cristell Maneux , Mukherjee Chhandak , Marina Deng , Bruno Neckel Wesling , Lucas Réveil , et al.
IEEE Latin American Electron Devices Conference (LAEDC 2022), Jul 2022, Puebla, Mexico. ⟨10.1109/LAEDC54796.2022.9908233⟩
Communication dans un congrès hal-03765071v1
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Evidence of Trapping and Electrothermal Effects in Vertical Junctionless Nanowire Transistors

 Yifang Wang , Houssem Rezgui , Mukherjee Chhandak , Marina Deng , Abhishek Kumar , et al.
9th Joint International EuroSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS) 2023, May 2023, Tarragona, Spain
Communication dans un congrès hal-04231605v1
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De l’ingénierie de contacts métalliques aux transistors 3D à grille entourante : Architectures alternatives pour MOS nanométriques

 Guilhem Larrieu
Micro et nanotechnologies/Microélectronique. Universite Toulouse III Paul Sabatier, 2016
HDR tel-01292061v1
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Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design

 Yifan Wang , Mukherjee Chhandak , Houssem Rezgui , Marina Deng , Cristell Maneux , et al.
IEEE 53rd European Solid-State Device Research Conference (ESSDERC 2023), Sep 2023, Lisbon, Portugal. pp.57-60, ⟨10.1109/ESSDERC59256.2023.10268560⟩
Communication dans un congrès hal-04231616v1
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Random telegraph signals in nanoscale vertical junctionless transistor with gate-all-around

 Simon Grall , Abhishek Kumar , Laurent Jalabert , Soo-Hyeon Kim , Guilhem Larrieu , et al.
Applied Physics Letters, 2022, 15 (7), pp.075001. ⟨10.35848/1882-0786/ac72f6⟩
Article dans une revue hal-03607609v1

Miniaturized 3D gas sensors based on silicon nanowires for ppb range detection

 Brieux Durand , Aurélie Lecestre , Philippe Menini , Guilhem Larrieu
8th Franco-Spanish Workshop Ibernam-CMC2, LAAS, Oct 2016, Toulouse, France
Communication dans un congrès hal-02193341v1

Top-Down Fabrication of Vertical Nanostructured Channel Arrays on SiGe for Future Nanoelectronics Applications

 Jonas Müller , Aurélie Lecestre , Rémi Demoulin , Fuccio Cristiano , J. M. Hartmann , et al.
MNE Eurosensors 2022, Sep 2022, Leuven, Belgium. 2022
Poster de conférence hal-03771503v1
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Modelling of vertical and ferroelectric junctionless technology for efficient 3D neural network compute cube dedicated to embedded artificial intelligence (Invited)

 Cristell Maneux , Mukherjee Chhandak , Marina Deng , Maeva Dubourg , Lucas Réveil , et al.
67th Annual IEEE International Electron Devices Meeting (IEDM 2021), Dec 2021, San Fransisco, United States. ⟨10.1109/IEDM19574.2021.9720572⟩
Communication dans un congrès hal-03408078v1
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Enhancement of electric and magnetic dipole transition of rare-earth-doped thin films tailored by high-index dielectric nanostructures

 Peter Wiecha , Clément Majorel , Christian Girard , Arnaud Arbouet , Bruno Masenelli , et al.
Applied optics, 2019, 58 (7), pp.1682. ⟨10.1364/AO.58.001682⟩
Article dans une revue hal-02086098v1

Conductive polymer coated 3D-nanostructured electrodes to enhance the stimulation and recording performances of neuronal activity

 Inès Muguet , Ali Maziz , Laurent Mazenq , Fabrice Mathieu , Guilhem Larrieu
2021 MRS Fall Meeting & exhibit, Nov 2021, Boston, United States
Communication dans un congrès hal-03845567v1
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Performance of vertical gate-all-around nanowire p-MOS transistors determined by boron depletion during oxidation

 Chiara Rossi , Alexander Burenkov , Peter Pichler , Eberhard Bär , Jonas Müller , et al.
Solid-State Electronics, 2023, 200, pp.108551. ⟨10.1016/j.sse.2022.108551⟩
Article dans une revue hal-04234531v1
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Analysis of Energy-Delay-Product for a 3D Vertical Nanowire FET Technology for Logic Applications

 Ian O'Connor , Zlatan Stanojevic , Oskar Baumgartner , Chhandak Mukherjee , Guilhem Larrieu , et al.
2020
Pré-publication, Document de travail hal-02732902v1

Integration of FinFETs and 3D nanoprobes devices on a common bio-platform for monitoring electrical activity of single neurons

 Adrien Casanova , Marie-Charline Blatché , Fabrice Mathieu , Luca Bettamin , Hélène Martin , et al.
2017 IEEE International Electron Devices Meeting (IEDM), Dec 2017, San Francisco, United States. ⟨10.1109/IEDM.2017.8268464⟩
Communication dans un congrès hal-01816371v1
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3D Logic circuit design oriented electrothermal modeling of vertical junctionless nanowire FETs

 Sara Mannaa , Arnaud Poittevin , Cédric Marchand , Damien Deleruyelle , Bastien Deveautour , et al.
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2023, 9 (2), pp.116 - 123. ⟨10.1109/JXCDC.2023.3309502⟩
Article dans une revue hal-04230911v1

Capillary-assisted dielectrophoresis as an innovative protocol to align nanowires at single-level

 Maéva Collet , Sven Salomon , Florent Seichepine , Yannick Coffinier , P. Caroff , et al.
Materials Research Society Fall Meeting, MRS Fall 2011, Symposium FF : Mechanical nanofabrication, nanopatterning, and nanoassembly, Nov 2011, Boston, MA, United States
Communication dans un congrès hal-00807158v1

Electron microscopy analysis of MOSFET structures

 J. Katcki , J. Ratajczak , A. Laszcz , F. Phillipp , Emmanuel Dubois , et al.
IEEE 6th Symposium Diagnostics and Yield 2003, Jun 2003, Warsaw, Poland. pp.67-70
Communication dans un congrès hal-00146402v1
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