Giorgio Di Natale
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Documents
Présentation
Giorgio Di Natale received the PhD in Computer Engineering from the Politecnico di Torino in 2003. He is director of research for the National Research Center of France at the TIMA laboratory in Grenoble.
His research interests include hardware security and trust, secure circuits design and test, reliability evaluation and fault tolerance, software implemented hardware fault tolerance, and VLSI testing.
Publications
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Rebooting Computing: The Challenges for Test and Reliability2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2019, Noordwijk, Netherlands. pp.8138-8143, ⟨10.1109/DFT.2019.8875270⟩
Communication dans un congrès
hal-02462194v1
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Hidden-Delay-Fault Sensor for Test, Reliability and SecurityIEEE Design Automation and Test Conference in Europe (DATE 2019), Mar 2019, Florence, Italy
Communication dans un congrès
hal-02166929v1
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Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN)IEEE VLSI Test Symposium (VTS 2019), Apr 2019, Monterey, United States
Communication dans un congrès
hal-02166904v1
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Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies26th IFIP IEEE International Conference on Very Large Scale Integration (VLSI SOC 2018), Oct 2018, Verona, Italy. pp.176-179, ⟨10.1109/VLSI-SoC.2018.8644897⟩
Communication dans un congrès
hal-01961756v1
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