Nombre de documents

150

CV de Giorgio Di Natale


Article dans une revue24 documents

  • Mario Barbareschi, Giorgio Di Natale, Lionel Torres. Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2016, 47, pp.3-10. <10.1016/j.micpro.2016.06.005>. <lirmm-01421001>
  • Stephan De Castro, Jean-Max Dutertre, Bruno Rouzeyre, Giorgio Di Natale, Marie-Lise Flottes. Frontside Versus Backside Laser Injection: A Comparative Study. ACM Journal on Emerging Technologies in Computing Systems, Association for Computing Machinery, 2016, Special Issue on Secure and Trustworthy Computing, 13 (1), pp.Art 7. <10.1145/2845999>. <lirmm-01444121>
  • Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, et al.. STT-MRAM-Based PUF Architecture exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. ACM Journal on Emerging Technologies in Computing Systems, Association for Computing Machinery, 2016, 13 (1), <10.1145/2790302>. <lirmm-01234046>
  • Alessandro Vallero, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Kooli Maha, et al.. Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview. Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2015, 39 (8), pp.1204-1214. <10.1016/j.micpro.2015.06.003>. <lirmm-01297595>
  • Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Bruno Rouzeyre, et al.. Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS. Microelectronics Reliability, Elsevier, 2014, 54 (9-10), pp.2289-2294. <10.1016/j.microrel.2014.07.151>. <emse-01094805>
  • Mafalda Cortez, Gijs Roelofs, Said Hamdioui, Giorgio Di Natale. Testing Methods for PUF-Based Secure Key Storage Circuits. Journal of Electronic Testing, Springer Verlag, 2014, 30 (5), pp.581-594. <10.1007/s10836-014-5471-7>. <lirmm-01234059>
  • Jean Da Rolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, et al.. Test versus Security: Past and Present. IEEE Transactions on Emerging Topics in Computing, Institute of Electrical and Electronics Engineers, 2014, pp.13. <http://www.computer.org/csdl/trans/ec/preprint/06733305-abs.html>. <10.1109/TETC.2014.2304492>. <lirmm-00989627>
  • Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Thwarting Scan-Based Attacks on Secure-ICs with On-Chip Comparison. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2014, 22 (4), pp.947-951. <10.1109/TVLSI.2013.2257903>. <lirmm-00841650>
  • Giorgio Di Natale. TRUDEVICE: A COST Action on "Trustworthy Manufacturing and Utilization of Secure Devices" (Editorial). Information Security Journal: A Global Perspective, Taylor & Francis, 2014, 22 (5-6), pp.205-207. <http://www.tandfonline.com/doi/abs/10.1080/19393555.2014.891283#.VEEVOdTLc4k>. <10.1080/19393555.2014.891283>. <lirmm-01075402>
  • Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Multi-Level Ionizing-Induced Transient Fault Simulator. Information Security Journal: A Global Perspective, Taylor & Francis, 2014, 22 (5-6), pp.251-264. <http://www.tandfonline.com/doi/abs/10.1080/19393555.2014.891280#.VEEP7tTLc4l>. <10.1080/19393555.2014.891280>. <lirmm-01075393>
  • Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. On the Effectiveness of Hardware Trojan Horse Detection via Side-Channel Analysis. Information Security Journal: A Global Perspective, Taylor & Francis, 2014, Trustworthy Manufacturing and Utilization of Secure Devices, 22 (5-6), pp.226-236. <10.1080/19393555.2014.891277>. <lirmm-00991362>
  • Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Bruno Rouzeyre, et al.. Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection. Microelectronics Reliability, Elsevier, 2013, European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 53 (9), pp.1320-1324. <10.1016/j.microrel.2013.07.069>. <emse-01100723>
  • Amitabh Das, Jean Da Rolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, et al.. Secure JTAG Implementation Using Schnorr Protocol. Journal of Electronic Testing, Springer Verlag, 2013, 29 (2), pp.193-209. <10.1007/s10836-013-5369-9>. <lirmm-00837904>
  • Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Feng Lu, Bruno Rouzeyre. A New Recovery Scheme Against Short-to-Long Duration Transient Faults in Combinational Logic. Journal of Electronic Testing, Springer Verlag, 2013, pp.001-010. <10.1007/s10836-013-5359-y>. <lirmm-00838389>
  • Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A Novel Differential Scan Attack on Advanced DFT Structures. Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2013, 18 (4), pp.58. <10.1145/2505014>. <lirmm-01075410>
  • Savino Alessandro, Stefano Di Carlo, Politano Gianfranco, Alfredo Benso, Alberto Bosio, et al.. Statistical Reliability Estimation of Microprocessor-Based Systems. IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2012, 61 (11), pp.1521-1534. <lirmm-00744608>
  • Rodrigo Possamai Bastos, Frank Sill Torres, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Novel Transient-Fault Detection Circuit Featuring Enhanced Bulk Built-in Current Sensor with Low-Power Sleep Mode. Microelectronics Reliability, Elsevier, 2012, 52 (9-10), pp.1781-1786. <10.1016/j.microrel.2012.06.149>. <lirmm-00715117>
  • Jean Da Rolt, Amitabh Das, Santos Ghosh, Giorgio Di Natale, Marie-Lise Flottes, et al.. Scan attacks on side-channel and fault attack resistant public-key implementations. Journal of Cryptographic Engineering, Springer, 2012, 2 (4), pp.207-219. <10.1007/s13389-012-0045-z>. <lirmm-00805687>
  • Jean Da Rolt, Amitabh Das, Santosh Ghosh, Giorgio Di Natale, Marie-Lise Flottes, et al.. Scan Attacks on Side-channel and Fault Attack Resistant Public-key Implementations. Journal of Cryptographic Engineering, Springer, 2012, 2 (4), pp.207-219. <10.1007/s13389-012-0045-z>. <lirmm-01075412>
  • Giorgio Di Natale, Marion Doulcier, Marie-Lise Flottes, Bruno Rouzeyre. Self-Test Techniques for Crypto-Devices. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2009, 18 (2), pp.329-333. <10.1109/TVLSI.2008.2010045>. <lirmm-00365359>
  • Giorgio Di Natale, Doulcier Marion, Marie-Lise Flottes, Bruno Rouzeyre. A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard. Journal of Electronic Testing, Springer Verlag, 2009, 25 (4-5), pp.269-278. <10.1007/s10836-009-5106-6>. <lirmm-00423026>
  • Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto. March Test Generation Revealed. IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2008, 57 (12), pp.1704-1713. <10.1109/TC.2008.105>. <lirmm-00350780>
  • Alberto Bosio, Giorgio Di Natale. March Test BDN, a new March Test for Dynamic Faults. Journal of Control Engineering and Applied Informatics, SRAIT, 2008, 10 (2), pp.3-9. <lirmm-00324111>
  • S. Cavallaro, C. Beck, E. Berthoumieux, R. Dayras, E. De Filippo, et al.. Origin and decay-properties of binary fragments produced in the $^{35}$Cl + $^{24}$Mg reaction at E/A AP $ \approx$ 8 MeV/A. Nuclear Physics A, Elsevier, 1995, 583, pp.161-164. <in2p3-00015254>

Communication dans un congrès104 documents

  • Papa-Sidy Ba, Sophie Dupuis, Manikandan Palanichamy, Marie-Lise Flottes, Giorgio Di Natale, et al.. Hardware Trust through Layout Filling: a Hardware Trojan Prevention Technique. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2016, Pittsburgh, United States. 2016, <http://www.isvlsi.org>. <10.1109/ISVLSI.2016.22>. <lirmm-01346529>
  • Papa-Sidy Ba, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre. Using Outliers to Detect Stealthy Hardware Trojan Triggering?. IVSW: International Verification and Security Workshop, Jul 2016, Sant Feliu de Guixols, France. IEEE International Verification and Security Workshop, 2016. <lirmm-01347119>
  • Manikandan Palanichamy, Papa-Sidy Ba, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, et al.. Duplication-based Concurrent Detection of Hardware Trojans in Integrated Circuits. TRUDEVICE, Nov 2016, Barcelona, Spain. 5th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, 2016, <https://trudevice2016.eel.upc.edu/>. <lirmm-01385551>
  • Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto. Security primitives (PUF and TRNG) with STT-MRAM. IEEE. VTS: VLSI Test Symposium, Apr 2016, Las Vegas, United States. 34th IEEE VLSI Test Symposium, 2016, <http://www.tttc-vts.org/public_html/new/2016/>. <10.1109/VTS.2016.7477292>. <lirmm-01374573>
  • Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio. Cache- and register-aware system reliability evaluation based on data lifetime analysis. VTS: VLSI Test Symposium , Apr 2016, Las Vegas, United States. 34th IEEE VLSI Test Symposium, 2016, <http://www.tttc-vts.org/public_html/new/2016/>. <10.1109/VTS.2016.7477299>. <lirmm-01374569>
  • Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto. Towards a Highly Reliable SRAM-based PUFs. EDA Consortium. DATE: Design, Automation and Test in Europe, Mar 2016, Dresden, Germany. 19th DATE conference and exhibition, 2016, <https://www.date-conference.com/proceedings-archive/2016/>. <lirmm-01374279>
  • Alberto Carelli, Giorgio Di Natale, Pascal Trotta, Tiziana Margaria. Towards Model Driven Design of Crypto Primitives and Processes. SAM: Sensor Array and Multichannel Signal Processing, Jul 2016, Rio de Janeiro, Brazil. CSREA Press, 9th IEEE Sensor Array and Multichannel Signal Processing Workshop (SAM), pp.152-158, 2016, <http://sam2016.cetuc.puc-rio.br>. <lirmm-01444948>
  • Maha Kooli, Giorgio Di Natale, Alberto Bosio. Cache-aware reliability evaluation through LLVM-based analysis and fault injection. IOLTS: International On-Line Testing Symposium, Jul 2016, Sant Feliu de Guixols, Spain. IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS), pp.19-22, 2016, <http://tima.imag.fr/conferences/iolts/iolts16/>. <10.1109/IOLTS.2016.7604663>. <lirmm-01444619>
  • Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto. STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation. IOLTS: International On-Line Testing Symposium, Jul 2016, Sant Feliu de Guixols, Spain. IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS), 2016, <10.1109/IOLTS.2016.7604694>. <lirmm-01444408>
  • Paolo Bernardi, Alberto Bosio, Giorgio Di Natale, Andrea Guerriero, Federico Venini. Faster-than-at-speed execution of functional programs: An experimental analysis. VLSI-SoC: Very Large Scale Integration-System-on-Chip, Sep 2016, Tallinn, Estonia. 24th IFIP/IEEE International Conference on Very Large Scale Integration, 2016, <10.1109/VLSI-SoC.2016.7753581>. <lirmm-01444403>
  • Luca Gnoli, Matteo Bollo, Marco Vacca, Mariagrazia Graziano, Giorgio Di Natale. True random number generator based on nanomagnets. NMDC - Nanotechnology Materials and Devices Conference, Oct 2016, Toulouse, France. 11th IEEE Nanotechnology Materials and Devices Conference (NMDC 2016), 2016, <http://ieeenmdc.org/nmdc-2016/>. <10.1109/NMDC.2016.7777089>. <lirmm-01444398>
  • Firas Kaddachi, Maha Kooli, Giorgio Di Natale, Alberto Bosio, Mojtaba Ebrahimi, et al.. System-level reliability evaluation through cache-aware software-based fault injection. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2016, Kosice, Slovakia. IEEE, IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016, <http://ddecs2016.fiit.stuba.sk/DDECS_2016/>. <10.1109/DDECS.2016.7482446>. <lirmm-01444721>
  • Alessandro Vallero, Alessandro Savino, Gianfranco Michele Maria Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, et al.. Cross-Layer System Reliability Assessment Against Hardware Faults. ITC: International Test Conference, Nov 2016, Fort Worth, TX, United States. IEEE, IEEE International Test Conference (ITC), 2016, <http://itctestweek.org>. <10.1109/TEST.2016.7805863>. <lirmm-01444774>
  • Mojtaba Ebrahimi, Maryam Rashvand, Firas Kaddachi, Mehdi B. Tahoori, Giorgio Di Natale. Revisiting software-based soft error mitigation techniques via accurate error generation and propagation models. IOLTS: International On-Line Testing Symposium, Jul 2016, Sant Feliu de Guixols, Spain. IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS), pp.66-71, 2016, <http://tima.imag.fr/conferences/iolts/iolts16/>. <10.1109/IOLTS.2016.7604674>. <lirmm-01444612>
  • Antonio Varriale, Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto, Pascal Trotta, et al.. SEcube™: An open-source security platform in a single SoC. DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2016, Istanbaul, Turkey. IEEE, 11th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2016, <http://dtis2016.teiath.gr>. <10.1109/DTIS.2016.7483810>. <lirmm-01444711>
  • Sophie Dupuis, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale, Papa-Sidy Ba. New Testing Procedure for Finding Insertion Sites of Stealthy Hardware Trojans. DATE: Design, Automation and Test in Europe, Mar 2015, Grenoble, France. IEEE, 2015. <lirmm-01141619>
  • Mario Barbareschi, Giorgio Di Natale, Florent Bruguier, Pascal Benoit, Lionel Torres. Ring Oscillators Analysis for FPGA Security Purposes. Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, Mar 2015, Grenoble, France. 2015. <lirmm-01419909>
  • Raphael Viera, Rodrigo Possamai Bastos, Jean-Max Dutertre, Olivier Potin, Marie-Lise Flottes, et al.. Validation Of Single BBICS Architecture In Detecting Multiple Faults. ATS: Asian Test Symposium, Nov 2015, Mumbai, India. 24th IEEE Asian Test Symposium. <https://www.ee.iitb.ac.in/ats15/>. <lirmm-01234067>
  • Jerome Rampon, Renaud Perillat, Lionel Torres, Pascal Benoit, Giorgio Di Natale, et al.. Digital Right Management for IP Protection. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France. pp.200-203, 2015, Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). <10.1109/ISVLSI.2015.127>. <lirmm-01234082>
  • Ricardo Chaves, Giorgio Di Natale, Lejla Batina, Shivam Bhasin, Baris Ege, et al.. Challenges in Designing Trustworthy Cryptographic Co-Processors. ISCAS: International Symposium on Circuits and Systems, May 2015, Lisbon, Portugal. Proceedings of the 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp.2009-2010, 2015, <10.1109/ISCAS.2015.7169070>. <lirmm-01234083>
  • Stephan De Castro, Jean-Max Dutertre, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Figure of merits of 28nm Si technologies for implementing laser attack resistant security dedicated circuits. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France. 2015, Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). <10.1109/ISVLSI.2015.76>. <emse-01227138>
  • Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto. Exploiting the Variability of the Magnetic Tunnel Junction for Security Purposes. e-NVM: Leading Edge Embedded NVM, Sep 2015, Gardanne, France. 2015. <lirmm-01276293>
  • Antonio Varriale, Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto, Tiziana Margaria. SEcubeTM: The most advanced, Open Source Security Platform in a Single Chip. TRUDEVICE: Secure Hardware and Security Evaluation, Sep 2015, Saint-Malo, France. 2015. <lirmm-01276298>
  • Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto. Zero Bit-Error-Rate Weak PUF based on Spin-Transfer-Torque MRAM Memories. TRUDEVICE: Secure Hardware and Security Evaluation, Sep 2015, Saint-Malo, France. 2015. <lirmm-01276300>
  • Mafalda Cortez, Said Hamdioui, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, et al.. Multi-segment Enhanced Scan-chains for Secure ICs. TRUDEVICE: Secure Hardware and Security Evaluation, Sep 2015, Saint-Malo, France. 4th workshop on Secure Hardware and Security Evaluation, 2015. <lirmm-01276304>
  • Ioana Vatajelu, Giorgio Di Natale, Lionel Torres, Paolo Prinetto. STT-MRAM-Based Strong PUF Architecture. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France. pp.467-472, 2015, Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). <10.1109/ISVLSI.2015.128>. <lirmm-01234079>
  • Mario Barbareschi, Lionel Torres, Giorgio Di Natale. Ring Oscillators Analysis for FPGA Security Purposes. TRUDEVICE: Secure Hardware and Security Evaluation, Sep 2015, St Malo, France. <lirmm-01234091>
  • Mafalda Cortez, Said Hamdioui, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Hierarchical Secure DfT. TRUDEVICE: Secure Hardware and Security Evaluation, Sep 2015, St Malo, France. TRUDEVICE 2015 – 4TH WORKSHOP ON SECURE HARDWARE AND SECURITY EVALUATION. <lirmm-01234095>
  • Ioana Vatajelu, Giorgio Di Natale, Marco Indaco, Paolo Prinetto. STT MRAM-Based PUFs. DATE: Design, Automation and Test in Europe, Mar 2015, Grenoble, France. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, 978-3-9815-3704-8, pp.872-875, 2015. <lirmm-01234087>
  • Papa-Sidy Ba, Palanichamy Manikandan, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, et al.. Hardware Trojan Prevention using Layout-Level Design Approach. IEEE. ECCTD: European Conference on Circuit Theory and Design, Aug 2015, Trondheim, Norway. Proceedings of the 2015 European Conference on Circuit Theory and Design (ECCTD), <10.1109/ECCTD.2015.7300093>. <lirmm-01234072>
  • Stephan De Castro, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Sensitivity to fault laser injection: a comparison between 28nm bulk and FD-SOI technology. TRUDEVICE: Secure Hardware and Security Evaluation, Sep 2015, Saint-Malo, France. 2015. <lirmm-01234094>
  • Yassine Fkih, Pascal Vivet, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale, et al.. 3D DFT Challenges and Solutions. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France. pp.603-608, Proceedings of 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). <10.1109/ISVLSI.2015.11>. <lirmm-01234076>
  • Raphael Viera, Rodrigo Possamai Bastos, Jean-Max Dutertre, Olivier Potin, Marie-Lise Flottes, et al.. Evaluation of Bulk Built-In Current Sensors Detecting Multiple Transient Faults. ATS: Asian Test Symposium, Nov 2015, Bombay, India. IEEE, IEEE Asian Test Symposium, 2015. <hal-01414752>
  • Kooli Maha, Giorgio Di Natale. A survey on simulation-based fault injection tools for complex systems. DTIS: Design & Technology of Integrated Systems In Nanoscale Era, May 2014, Santorini, Greece. 2014, Design & Technology of Integrated Systems In Nanoscale Era (DTIS), 2014 9th IEEE International Conference On. <10.1109/DTIS.2014.6850649>. <hal-01075473>
  • Kooli Maha, Giorgio Di Natale, Pascal Benoit, Alberto Bosio, Lionel Torres, et al.. Fault injection tools based on Virtual Machines. ReCoSoC: Reconfigurable and Communication-Centric Systems-on-Chip, May 2014, Montpellier, France. 2014, Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2014 9th International Symposium on. <10.1109/ReCoSoC.2014.6861351>. <hal-01075479>
  • Jean-Max Dutertre, Stephan De Castro, Alexandre Sarafianos, Noémie Boher, Bruno Rouzeyre, et al.. Laser attacks on integrated circuits: from CMOS to FD-SOI. DTIS: Design and Technology of Integrated Systems, May 2014, Santorin, Greece. 9th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014, <10.1109/DTIS.2014.6850664>. <emse-01099042>
  • Luca Cassano, Alberto Bosio, Giorgio Di Natale. A novel Adaptive Fault Tolerant Flip-Flop Architecture based on TMR. ETS: European Test Symposium, May 2014, Paderborn, Germany. IEEE, 978-1-4799-3415-7/14, 2014, 19th IEEE European Test Symposium (ETS 2014). <10.1109/ETS.2014.6847831>. <lirmm-01234133>
  • Nicolas Sklavos, Giorgio Di Natale. TRUDEVICE Project: Trustworthy Manufacturing and Utilization of Secure Devices. HiPEAC Computing Systems Week (CSW), Oct 2014, Athens, Greece. 2014, <https://www.hipeac.net/csw/2014/athens/>. <lirmm-01234099>
  • Giorgio Di Natale, Paolo Prinetto, Ioana Vatajelu. MRAM-based PUF. Joint MEDIAN-TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands. <lirmm-01234112>
  • Stefano Di Carlo, Alessandro Vallero, Dirnitris Gizopoulos, Giorgio Di Natale. Cross-Layer Early Reliability Evaluation for the Computing Continuum. IEEE. DSD: Digital System Design, Aug 2014, Verona, Italy. 978-1-4799-5793-4/14, pp.199-205, 2014, Digital System Design (DSD), 2014 17th Euromicro Conference on. <10.1109/DSD.2014.65>. <lirmm-01234117>
  • Mafalda Cortez, Gijs Roelofs, Said Hamdioui, Giorgio Di Natale. Secure Test Method for Fuzzy Extractor. Joint MEDIAN-TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands. 2014. <lirmm-01234106>
  • Cristiana Bolchini, Luca Cassano, Giorgio Di Natale. Multi-stage Cross-layer Hardware Trojan Prevention, Detection and Tolerance. Joint MEDIAN-TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands. 2014. <lirmm-01234110>
  • Mafalda Cortez, Gijs Roelofs, Said Hamdioui, Giorgio Di Natale. Testing PUF-Based Secure Key Storage Circuits. DATE: Design, Automation and Test in Europe, Mar 2014, Dresden, Germany. pp.1-6, 2014, Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014. <10.7873/DATE.2014.207>. <lirmm-01234141>
  • Said Hamdioui, Giorgio Di Natale, Battum Van, Jean-Luc Danger, Fethulah Smailbegovic, et al.. Hacking and Protecting IC Hardware. DATE: Design, Automation and Test in Europe, Mar 2014, Dresden, Germany. 978-3-9815370-2-4/DATE14, pp.1-7, 2014, Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014. <10.7873/DATE.2014.112>. <lirmm-01234147>
  • Vincent Beroulle, Philippe Candelier, Stephan De Castro, Giorgio Di Natale, Jean-Max Dutertre, et al.. Laser-Induced Fault Effects in Security-Dedicated Circuits. Luc Claesen; Maria-Teresa Sanz-Pascual; Ricardo Reis; Arturo Sarmiento-Reyes. VLSI-SoC: Very Large Scale Integration - System on a Chip, Oct 2014, Playa del Carmen, Mexico. 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration - System on a Chip, AICT-464, pp.220-240, 2015, IFIP Advances in Information and Communication Technology. <10.1007/978-3-319-25279-7_12>. <hal-01383737>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Hakim Zimouche. Built-In Self-Test for Manufacturing TSV Defects before bonding. IEEE. VTS: VLSI Test Symposium, Apr 2014, Napa, CA, United States. 32nd IEEE VLSI Test Symposium (VTS) pp.1-6, 2014, <10.1109/VTS.2014.6818771>. <lirmm-00989682>
  • Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Simulating Laser Effects on ICs, from Physical Level to Gate Level: a comprehensive approach. TRUDEVICE'2014: Test and Fault Tolerance for Secure Devices, May 2014, Paderborn, Germany. 2014. <lirmm-01119614>
  • Yassine Fkih, Pascal Vivet, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale, et al.. 2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT Architectures. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2014, Tampa, Florida, United States. pp.386-391, 2014, Proceedings of the 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). <10.1109/ISVLSI.2014.83>. <lirmm-01119605>
  • Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Layout-Aware Laser Fault Injection Simulation and Modeling: from physical level to gate level. DTIS'2014: 9th International Conference on Design & Technology of Integrated Systems, May 2014, Santorin, Greece. IEEE, <10.1109/DTIS.2014.6850665>. <lirmm-01119592>
  • Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Customized Cell Detector for Laser-Induced-Fault Detection. IOLTS'2014: 20th International On-Line Testing Symposium, Jul 2014, Girona, Spain. pp.37-42, <10.1109/IOLTS.2014.6873669>. <lirmm-01119576>
  • Sophie Dupuis, Papa-Sidy Ba, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A Novel Hardware Logic Encryption Technique for thwarting Illegal Overproduction and Hardware Trojans. IOLTS'14: 20th International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Catalunya, Spain. IEEE, pp.49-54, 2014, <http://tima.imag.fr/conferences/IOLTS/iolts14/>. <lirmm-01025275>
  • Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Antonio Gonzales, et al.. Cross-Layer Early Reliability Evaluation: Challenges and Promises. IEEE. IOLTS: International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Girona, Spain. 20th IEEE International On-Line Testing Symposium, pp.228-233, 2014, <10.1109/IOLTS.2014.6873704>. <lirmm-01234123>
  • Rodrigo Possamai Bastos, Frank Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, et al.. A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults. PATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2013, Karlsruhe, Germany. 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation, pp.157-163, 2013, <http://www.patmos-conf.org/>. <10.1109/PATMOS.2013.6662169>. <lirmm-00968621>
  • Rodrigo Possamai Bastos, Franck Sill Torres, Jean Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, et al.. A Bulk Built-in Sensor for Detection of Fault Attacks. HOST: Hardware-Oriented Security and Trust, Jun 2013, Austin, TX, United States. 6th Annual IEEE International Symposium on Hardware-Oriented Security and Trust, pp.51-54, 2013, <10.1109/HST.2013.6581565>. <lirmm-01430800>
  • Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Laser-Induced Fault Simulation. EUROMICRO DSD/SEAA, Sep 2013, Santander, Spain. 16th Euromicro Conference on Digital System Design (DSD) & 39th Euromicro Conference on Software Engineering and Advanced Applications (SEAA), pp.609-614, 2013, <http://www.teisa.unican.es/dsd-seaa-2013/>. <10.1109/DSD.2013.72>. <lirmm-01430807>
  • Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A smart test controller for scan chains in secure circuits. IOLTS: International On-Line Testing Symposium, Jul 2013, Chania, Greece. 19th IEEE International On-Line Testing Symposium, pp.228-229, 2013, <http://tima.imag.fr/conferences/iolts/iolts13/>. <10.1109/IOLTS.2013.6604085>. <lirmm-01430814>
  • Hakim Zimouche, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale. A BIST Method for TSVs Pre-Bond Test. IDT'13: 8th IEEE International Design & Test Symposium, Dec 2013, Marrakesh, Morocco. pp.1-6, 2013, <http://idtsymposium.org/>. <10.1109/IDT.2013.6727081>. <lirmm-00989727>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Hakim Zimouche. TSVs Pre-Bond Testing: a test scheme for capturing BIST responses. 3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Sep 2013, Anaheim, United States. IEEE, Fourth IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits 3D-Test in conjunction with ITC / Test Week 2013 September 12-13, 2013 - Disneyland Hotel – Anaheim, California, USA, 2013, <http://www.pld.ttu.ee/3dtest/past_events/2013/>. <lirmm-00989707>
  • Yassine Fkih, Pascal Vivet, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale, et al.. 3D Design For Test Architectures Based on IEEE P1687. 3D-TEST'13: Fourth IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, Sep 2013, Anaheim, California, United States. 2013. <lirmm-00989717>
  • Yassine Fkih, Pascal Vivet, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A 3D IC BIST for pre-bond test of TSVs using Ring Oscillators. NEWCAS: New Circuits and Systems, Jun 2013, Paris, France. IEEE, 11th International International New Circuits and Systems Conference, pp.001-004, 2013, <http://www.newcas2013.org/>. <lirmm-00838524>
  • Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Bruno Rouzeyre, et al.. Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection. ESREF: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Sep 2013, Arcachon, France. IEEE Computer Society, 24th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, pp.B3c-2 #68, 2013. <hal-00872705>
  • Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Identification of Hardware Trojans triggering signals. First Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2013, Avignon, France. 2013, <http://trudevice.com/Workshop/>. <lirmm-00991360>
  • Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Are Advanced DfT Structures Sufficient for Preventing Scan-Attacks?. VTS'12: 30th IEEE VLSI Test Symposium, Apr 2012, Maui, Hawai, United States. IEEE, pp.246-251, 2012, IEEE Catalog number : CFP12029-CDR. <http://www.tttc-vts.org/public_html/new/2012/index.php>. <lirmm-00694536>
  • Jean Da Rolt, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale, Amitabh Das, et al.. A Scan-based Attack on Elliptic Curve Cryptosystems in presence of Industrial Design-for-Testability Structures. IEEE International Symposium on Defect and Fault Tolerance in VLSI & Nanotechnology Systems, United States. http://www.dfts.org/, 2012. <lirmm-00744472>
  • Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. On-Chip Comparison for Testing Secure ICs. DCIS'2012: Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. pp.112-117, 2012. <lirmm-00795205>
  • Rodrigo Possamai Bastos, Frank Sill Torres, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode. ESREF: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Oct 2012, Cagliari, Italy. 23rd European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 2012. <hal-00867864>
  • Rodolphe Giroudeau, Florent Hernandez, Michel Gendreau, Marie-Lise Flottes, Giorgio Di Natale, et al.. Circuits intégrés en 3D. ROADEF: Recherche Opérationnelle et d'Aide à la Décision, Apr 2012, Angers, France. 13e congrès annuel de la Société française de Recherche Opérationnelle et d’Aide à la Décision, 2012, <http://roadef2012.ima.uco.fr/index.htm>. <lirmm-00805058>
  • Jean Da Rolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, et al.. A New Scan Attack on RSA in Presence of Industrial Countermeasures. Third International Workshop on Constructive Side-Channel Analysis and Secure Design, May 2012, Darmstadt, Germany. Springer, 7275, pp.89-104, 2012, Lecture Notes in Computer Science (LNCS). <http://cosade.cased.de/>. <lirmm-00719986>
  • Giorgio Di Natale, Sophie Dupuis, Bruno Rouzeyre. Is Side-Channel Analysis really reliable for detecting Hardware Trojans?. DCIS'2012: XVII Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. pp.238-242, 2012, <http://www.lirmm.fr/dcis2012/index.php>. <lirmm-00823477>
  • Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. New Security Threats Against Chips Containing Scan Chain Structures. HOST'11: IEEE International Symposium on Hardware-Oriented Security and Trust, San Diego, CA, United States. pp.105-110, 2011. <lirmm-00599690>
  • Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. How to Sample Results of Concurrent Error Detection Schemes in Transient Fault Scenarios?. RADECS: Radiation and Its Effects on Components and Systems, Sep 2011, Sevilla, Spain. IEEE, 12th European Conference on Radiation and Its Effects on Components and Systems, pp.635-642, 2012, <http://www.radecs.net/>. <10.1109/RADECS.2011.6131361>. <lirmm-00701776>
  • Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A New Bulk Built-in Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies. IEEE. DFT'2011: International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2011, Vancouver, Canada. pp.302-308, 2011, <http://www.dfts.org/>. <10.1109/DFT.2011.15>. <lirmm-00701789>
  • Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Timing Issues for an Efficient Use of Concurrent Error Detection Codes. LATW: Latin American Test Workshop, Mar 2011, Porto de Galinhas, Brazil. 12th IEEE Latin American Test Workshop, pp.1-6, 2011, <http://www.feng.pucrs.br/~sisc/LATW/2011.html/>. <10.1109/LATW.2011.5985933>. <lirmm-00627427>
  • Jean Da Rolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Scan Attacks and Countermeasures in Presence of Scan Response Compactors. ETS: European Test Symposium, May 2011, Trondheim, Norway. 16th IEEE European Test Symposium, pp.19-24, 2011, <http://www.ieee-ets.org/>. <10.1109/ETS.2011.30>. <lirmm-00647062>
  • Jean Da Rolt, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre. New side-channel attack against scan chains. 9th CryptArchi Workshop (2011), Jun 2011, Bochum, Germany. pp.2, 2011, <http://labh-curien.univ-st-etienne.fr/cryptarchi/>. <lirmm-00648575>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Miroslav Valka, Denis Real. Power Consumption Traces Realignment to Improve Differential Power Analysis. DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Germany. pp.201-206, 2011. <lirmm-00592005>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Ensuring High Testability without Degrading Security. DDECS'10: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Vienna, Austria. pp.6, 2010. <lirmm-00480710>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Miroslav Valka. Waveforms re-Alignment to Improve DPA Attacks. CryptArchi'10: Cryptographic Architectures Embedded in Reconfigurable Devices, Jun 2010, Gif-sur-Yvette, France. 2010, <http://labh-curien.univ-st-etienne.fr/cryptarchi/workshop10/program.html>. <lirmm-00539994>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers. DELTA'10: Fifth IEEE International Symposium on Electronic Design, Test and Application, Jan 2010, Ho Chi Minh City, Vietnam. pp.256-261, 2010. <lirmm-00539993>
  • Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption Standard. IOLTS'10: IEEE 16th International On-Line Testing Symposium, Jul 2010, Greece. pp.223 - 228, 2010, <http://tima.imag.fr/conferences/iolts/iolts10/index.htm>. <10.1109/IOLTS.2010.5560196>. <lirmm-00539232>
  • Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption Standard. ETS: European Test Symposium, May 2010, Prague, Czech Republic. 15th IEEE European Test Symposium, 2010. <lirmm-00493247>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Execution Time Reduction of Differential Power Analysis Experiments. LATW'09: 10th Latin-American Test Workshop, Mar 2009, Armaçao dos Buzios, Brazil, pp.1-5, 2009, <10.1109/LATW.2009.4813819>. <lirmm-00367712>
  • Marie-Lise Flottes, Giorgio Di Natale, Paolo Maistri, Bruno Rouzeyre, Régis Leveugle. Ensuring High Testability without Degrading Security. ETS: European Test Symposium, May 2009, Seville, Spain. 14th IEEE European Test Symposium, 2009, <http://www.ieee-ets.org/>. <lirmm-00407163>
  • Alberto Bosio, Giorgio Di Natale. LIFTING: An open source logic simulator. DATE: Design, Automation and Test in Europe, 2009, Nice, France. 2009. <lirmm-00407166>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Tutorial on Design For Testability & Digital Security. IEEE 10th Latin American Test Workshop, 2009, Buzios, Brazil. 2009, <http://inf.ufrgs.br/latw/>. <lirmm-00407161>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. An Integrated Validation Environment for Differential Power Analysis. DATE'09: Design Automation and Test in Europe, Nice, France. 2009. <lirmm-00407165>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. An Integrated Validation Environment for Differential Power Analysis. IEEE Computer Society. DELTA'08: 4th IEEE International Symposium on Electronic Design, Test & Applications, Jan 2008, Hong Kong, pp.527-532, 2008, <http://www.ece.ust.hk/delta2008/>. <lirmm-00220458>
  • Alberto Bosio, Giorgio Di Natale. LIFTING: an Open-Source Logic Simulator. SAME'08: Sophia-Antipolis Forum on MicroElectronics 2008, Sep 2008, Sophia-Antipolis, France. 2008. <lirmm-00363795>
  • Alberto Bosio, Giorgio Di Natale. March Test BDN: A new March Test for Dynamic Faults. IEEE CS. AQTR'08: Automation, Quality and Testing, Robotics, May 2008, Cluj-Napoca, Romania, IEEE, pp.085-089, 2008. <lirmm-00303528>
  • Giorgio Di Natale, Marion Doulcier, Marie-Lise Flottes, Bruno Rouzeyre. Low Cost Self-Test of Crypto-Devices. WDSN'08: 2nd Workshop on Dependable and Secure Nanocomputing, Jun 2008, Anchorage, Canada, United States. pp.41-46, 2008, <http://www.ece.cmu.edu/~koopman/dsn08/index.html>. <lirmm-00295108>
  • Giorgio Di Natale, Marion Doulcier, Marie-Lise Flottes, Bruno Rouzeyre. A Reliable Architecture for the Advanced Encryption Standard. ETS: European Test Symposium, May 2008, Verbania, Italy. 13th IEEE European Test Symposium, pp.13-18, 2008. <lirmm-00285868>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. An Integrated Validation Environment for Differential Power Analysis. CryptArchi'08: Cryptographic Architectures Embedded in Reconfigurable Devices, Jun 2008, Tregastel, France. 2008. <lirmm-00332534>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Stuck-at-Faults Test using Differential Power Analysis. LPonTR'08: Workshop on Low Power Design Impact on Test and Reliability, May 2008, Italy. 2008, <http://www.cad.polito.it/~ets08/LPonTR/LPonTR.html>. <lirmm-00332529>
  • Philipp Öhler, Sybille Hellebrand, Alberto Bosio, Giorgio Di Natale. Modularer Selbsttest und Optimierte Reparaturanalyse für Eingebettete Speicher. ZUE'08: Zuverlässigkeit und Entwurf, Germany. pp.049-056, 2008. <lirmm-00332558>
  • Stefano Di Carlo, Giorgio Di Natale, Mariani Riccardo. On-Line Instruction-Checking in Pipelined Microprocessors. ATS: Asian Test Symposium, Nov 2008, Saporro, Japan. 17th IEEE Asian Test Symposium, pp.377-382, 2008, <10.1109/ATS.2008.47>. <lirmm-00363689>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A Reliable Architecture for Substitution Boxes in Integrated Cryptographic. DCIS'08: Conference on Design of Circuits and Integrated Systems, Nov 2008, CD-ROM, pp.27-32, 2008. <lirmm-00363783>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. An Integrated Validation Environment for Differential Power Analysis. SAME'08: Sophia-Antipolis Forum on MicroElectronics 2008, Sep 2008, Sophia-Antipolis, France. 2008. <lirmm-00363796>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Observability of Stuck-at-Faults with Differential Power Analysis. LATW'08: IEEE Latin American Test Workshop, Feb 2008, Mexico. pp.N/A, 2008, <http://www-elec.inaoep.mx/latw2008/index.php>. <lirmm-00295498>
  • Alberto Bosio, Giorgio Di Natale. LIFTING: A Flexible Open-Source Fault Simulator. ATS: Asian Test Symposium, Nov 2008, Saporro, Japan. 17th IEEE Asian Test Symposium, pp.035-040, 2008, <http://ats08.info.hiroshima-cu.ac.jp/>. <lirmm-00343610>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. On-Line Self-Test of AES Hardware Implementations. DSN'07: Workshop on Dependable and Secure Nanocomputing, Jun 2007, Edinburgh, United Kingdom. 2007. <lirmm-00163405>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. An On-Line Fault Detection Scheme for SBoxes in Secure Circuits. IEEE. IOLTS'07: 13th IEEE International On-Line Testing Symposium, Jul 2007, Heraklion, Crete, Greece, pp.57-62, 2007. <lirmm-00163244>
  • Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre, Marion Doulcier. Test and Security. CryptArchi'07: Cryptographic Architectures Embedded in Reconfigurable Devices, Jun 2007, Montpellier, France. 2007, <http://cryptarchi.univ-st-etienne.fr/workshop07/index.htm>. <lirmm-00163017>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A Novel Parity Bit Scheme for SBOX in AES Circuits. DDECS'07: Design and Diagnostics of Electronic Cicruits and Systems, Apr 2007, Cracovie, Pologne, IEEE, pp.267-271, 2007. <lirmm-00141799>
  • C. Beck, D. Mahboub, R. Nouicer, B. Djerroud, R.M. Freeman, et al.. Light charged particle emission in highly excited and deformed $^{59}$Cu di-nucleus. XXXIII International Winter Meeting on Nuclear Physics, Jan 1995, Bormio, Italy. 101, pp.127-139, 1995. <in2p3-00015252>

Poster10 documents

  • Papa-Sidy Ba, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre. Detection and Prevention of Hardware Trojan through Logic Testing. TRUDEVICE, Nov 2016, Barcelona, Spain. 4th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, Manufacturing test of secure devices / Reverse engineering countermeasures / Other topics, pp.#33, 2016, Posters IV. <https://trudevice2016.eel.upc.edu/>. <lirmm-01430007>
  • Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Giorgio Di Natale, et al.. Design of Bulk Built-In Current Sensors to Detect Single Event Effects and Laser-Induced Fault Injection Attempts . Joint MEDIAN–TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands. <emse-01099040>
  • Rodolphe Giroudeau, Giorgio Di Natale, Marie-Lise Flottes, Florent Hernandez. Exact wafer matching process wafer to wafer inegration. Whorshop 3D integration Applications, France. pp.N/A, 2012. <lirmm-00805059>
  • Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Calibrating Bulk Built-in Current Sensors for Detecting Transient Faults. Colloque GRD SoC-SiP, 2012, Lyon, France. 2012, Colloque National du Groupement de Recherche System-On-Chip et System-In-Package. <lirmm-00715126>
  • Giorgio Di Natale, Marie-Lise Flottes, Feng Lu, Bruno Rouzeyre. tLIFTING : A Multi-level Delay-annotated Fault Simulator for Digital Circuits. DCIS'2012: XVII Conference on Design of Circuits and Integrated Systems, Nov 2012, avignon, France. pp.1, 2012, <http://www.lirmm.fr/dcis2012/>. <lirmm-00799892>
  • Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Timing Issues of Transient Faults in Concurrent Error Detection Schemes. GdR SoC-SiP'2011: Colloque national du Groupement de Recherche System-On-Chip et System-In-Package, Lyon, France. http://www2.lirmm.fr/~w3mic/SOCSIP/, 2011, <http://www2.lirmm.fr/~w3mic/SOCSIP/>. <lirmm-00701798>
  • Alberto Bosio, Giorgio Di Natale. Parallel Test of Identical Cores Using Test Elevators in 3D Circuits. 3D-Test: First IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, Austin, Texas, United States. pp.N/A, 2010, <http://3dtest.tttc-events.org>. <lirmm-00537857>
  • Philipp Öhler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand. A Modular Memory BIST for Optimized Memory Repair. IEEE Computer Society. IOLTS'08: IEEE International On-line Testing Symposium, Jul 2008, pp.171-172, 2008, <10.1109/IOLTS.2008.30>. <lirmm-00363724>
  • Mohammad Hosseinabady, M. H. Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, et al.. Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. IEEE. IOLTS'07: International On-Line Testing Symposium, Jul 2007, Heraklion, Crete, Greece, pp.205-206, 2007. <lirmm-00163343>
  • Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A Dependable Parallel Architecture for SBoxes. ReCoSoc'07: International Workshop on Reconfigurable Communication Centric System-On-Chips, Jun 2007, Montpellier, France. pp.CD-ROM, 2007. <lirmm-00163414>

Autre publication5 documents

  • Patrick Girard, Serge Bernard, Florence Azaïs, Alberto Bosio, Luigi Dilillo, et al.. Rapport Technique intermédiaire, Contrat TOETS CT 302, Programme CEE CATRENE. 2011. <lirmm-00679018>
  • Patrick Girard, Serge Bernard, Florence Azaïs, Alberto Bosio, Luigi Dilillo, et al.. Rapport Technique de fin d'année, Contrat TOETS CT 302, Programme CEE CATRENE. 2011. <lirmm-00679022>
  • Patrick Girard, Serge Bernard, Florence Azaïs, Alberto Bosio, Luigi Dilillo, et al.. Contrat TOETS CT 302 - Programme CEE CATRENE (Rapport Intermédiaire). 2010. <lirmm-00504873>
  • Patrick Girard, Florence Azaïs, Serge Bernard, Alberto Bosio, Luigi Dilillo, et al.. TOETS CT302 - Programme CEE CATRENE - Summary Technical Report 2S-2009 - Rapport Technique de Fin d'année. 2010. <lirmm-00461745>
  • Marion Doulcier, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. Test and Harware Security. 2008. <lirmm-00365276>

Chapitre d'ouvrage3 documents

HDR1 document

  • Giorgio Di Natale. Conception et test des circuits et systèmes numériques à haute fiabilité et sécurité. Micro and nanotechnologies/Microelectronics. Université de Montpellier II, 2014. <tel-01276281>

Direction d'ouvrage, Proceedings2 documents

  • Aida Todri-Sanial, Giorgio Di Natale, Patrick Girard, Marc Belleville, Saraju P. Mohanty, et al.. Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI - 2015). Jul 2015, Montpellier, France. IEEE, 2015, 978-1-4799-8718-4. <www.isvlsi.org>. <lirmm-01433587>
  • Patrick Girard, Sybille Hellebrand, Zabo Peng, Matteo Sonza Reorda, Giorgio Di Natale. Proceedings of IEEE European Test Symposium (ETS - 2013). May 2013, Avignon, France. IEEE, 2013, 978-1-4673-6375-4. <http://www.ieee-ets.org/past_events/ets13/>. <lirmm-01433571>

Rapport1 document

  • Nadia El Mrabet, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Jean-Claude Bajard. Differential Power Analysis against the Miller Algorithm. RR-08021, 2008. <lirmm-00323684>