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Gilles Sassatelli

11
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Publications

pierre-yves-peneau
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Improving the Performance of STT-MRAM LLC through Enhanced Cache Replacement Policy

Pierre-Yves Péneau , David Novo , Florent Bruguier , Lionel Torres , Gilles Sassatelli
ARCS: Architecture of Computing Systems, Apr 2018, Braunschweig, Germany. pp.168-180, ⟨10.1007/978-3-319-77610-1_13⟩
Communication dans un congrès lirmm-01669254v2
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Performance and Energy Assessment of Last-Level Cache Replacement Policies

Pierre-Yves Péneau , David Novo , Florent Bruguier , Gilles Sassatelli , Abdoulaye Gamatié
EDiS: Embedded and Distributed Systems, Dec 2017, Oran, Algeria. ⟨10.1109/EDIS.2017.8284032⟩
Communication dans un congrès lirmm-01651247v1
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MAGPIE: System-level Evaluation of Manycore Systems with Emerging Memory Technologies

Thibaud Delobelle , Pierre-Yves Péneau , Abdoulaye Gamatié , Florent Bruguier , Sophiane Senni
EMS: Emerging Memory Solutions, Mar 2017, Lausanne, Switzerland
Communication dans un congrès lirmm-01467328v1
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Embedded systems to high performance computing using STT-MRAM

Sophiane Senni , Thibaud Delobelle , Odilia Coi , Pierre-Yves Péneau , Lionel Torres
DATE 2017 - 20th Design, Automation and Test in Europe Conference and Exhibition, Mar 2017, Lausanne, Switzerland. pp.536-541, ⟨10.23919/DATE.2017.7927046⟩
Communication dans un congrès lirmm-01548996v1
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Flot automatique d’évaluation pour l’exploration d’architectures à base de mémoires non volatiles

Thibaud Delobelle , Pierre-Yves Péneau , Sophiane Senni , Florent Bruguier , Abdoulaye Gamatié
ComPAS: Conférence en Parallélisme, Architecture et Système, Jul 2016, Lorient, France
Communication dans un congrès lirmm-01345975v1
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Loop Optimization in Presence of STT-MRAM Caches: a Study of Performance-Energy Tradeoffs

Pierre-Yves Péneau , Rabab Bouziane , Abdoulaye Gamatié , Erven Rohou , Florent Bruguier
PATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2016, Bremen, Germany. pp.162-169, ⟨10.1109/PATMOS.2016.7833682⟩
Communication dans un congrès hal-01347354v1