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135 résultats
Systèmes multiprocesseurs sur puce 1 - ArchitecturesISTE - International Scientific and Technical Encyclopedia, 2023, 978-1-78948-021-4
Ouvrages
hal-04131338v1
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HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic2016 Euromicro Conference on Digital System Design (DSD), 2016, Limassol, Cyprus. pp.511-518, ⟨10.1109/DSD.2016.51⟩
Communication dans un congrès
hal-01389247v1
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Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management frameworkJournal of Electronic Imaging, 2014, 23 (2), pp.053012. ⟨10.1117/1.JEI.23.5.053012⟩
Article dans une revue
hal-01333939v1
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EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile SystemsIEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA'14), Aug 2014, Milano, Italy. pp.182-189
Communication dans un congrès
hal-01408838v1
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Multi-Processor System-on-Chip 1: Architectureswiley, chichester, uk, 1, pp.320, 2021, 978-1-789-45021-7
Ouvrages
hal-03194277v1
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Multi-CPU/FPGA Platform Based Heterogeneous Multiprocessor prototyping: New Challenges for Embedded Software DesignersRapid System Prototyping Symposium (RSP'08), Jun 2008, Monterey, United States. pp.41-47, ⟨10.1109/RSP.2008.27⟩
Communication dans un congrès
hal-00293652v1
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Introspection mechanisms for Semi-Formal Verification in a System-Level Design environmentIEEE Workshop on Rapid System Prototyping (RSP’06), IEEE, 2006, Chania, Greece. pp.91-97, ⟨10.1109/RSP.2006.22⟩
Communication dans un congrès
hal-00156414v1
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Task migration in multi-tiled MPSoC : Challenges, state-of-the-art and preliminary solutionsJournées nationales du réseau doctoral en Microélectronique (JNRDM'12), May 2012, Marseille, France
Communication dans un congrès
hal-01408860v1
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FlexOE: A Congestion-Aware Routing Algorithm for NoCsIEEE International Symposium on Rapid System Prototyping, Oct 2013, Montreal, Canada. 7 p
Communication dans un congrès
ujm-00870338v1
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Outils de génération de logiciel pour les systèmes sur puce multi-processeur hétérogènesJournées Nationales du RÉseau Doctoral en Microélectronique (JNRDM'09), Lyon, May 13-20, May 2009, Lyon, France
Communication dans un congrès
hal-00378190v1
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A codesign experiment in acoustic echo cancellation: GMDFαACM Transactions on Design Automation of Electronic Systems, 1997, 2 (4), pp.365-383. ⟨10.1145/268424.268433⟩
Article dans une revue
hal-01334174v1
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Implementation and Evaluation of a Hardware Decentralized Synchronization Lock for MPSoCsInternational Parallel and Distributed Processing Symposium (IPDPS 2020), May 2020, New Orleans, United States. pp.1112-1121
Communication dans un congrès
hal-03194329v1
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Cohérence des communications lors de la migration de tâches matériellesISTE. Systèmes multiprocesseurs sur puce 1 - Architectures, ISTE - International Scientific and Technical Encyclopedia, pp.309-343, 2023, ⟨10.51926/ISTE.9021.ch11⟩
Chapitre d'ouvrage
hal-04131346v1
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Vers l'Automatisation de la Conception des Coprocesseurs de Communication pour les Systèmes MonopucesJournées nationales du réseau doctoral en Microélectronique (JNRDM'05), May 2005, Paris, France
Communication dans un congrès
hal-01410225v1
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A Novel Method for Enabling FPGA Context-Switch (Abstract Only)Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015, Monterey, CA, USA, United States. pp.261--261, ⟨10.1145/2684746.2689096⟩
Communication dans un congrès
hal-01353496v1
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Design of a pseudo-log image transform IP in an HLS-based memory management frameworkConference of Real-Time Image and Video Processing, Feb 2013, Burlingame, California, United States. 15 p., ⟨10.1117/12.2004272⟩
Communication dans un congrès
hal-00919902v1
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Lightweight Task Migration in Embedded Multi-Tiled Architectures Using Task Code ReplicationIEEE International Symposium on Rapid System Prototyping (RSP'14), Oct 2014, Delhi, India. pp.93-99
Communication dans un congrès
hal-01408819v1
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FlexOE : Un Algorithme de Routage Adaptatif pour le contrôle de Congestion dans les Réseaux sur PuceColloque national sur le traitement du signal et des images Gretsi, Sep 2013, brest, France. 6 p
Communication dans un congrès
ujm-00857978v1
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Large Scale On-Chip Networks : An Accurate Multi-FPGA Emulation Platform11th EUROMICRO Conference on Digital System Design Architectures Methods and Tools (DSD'08), Sep 2008, Parma, Italy. pp.3-9, ⟨10.1109/DSD.2008.130⟩
Communication dans un congrès
hal-00349055v1
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An optimal memory allocation for application-specific multiprocessor system-on-chipInternational Symposium on System Synthesis (ISSS'01), 2001, Montreal, Canada. pp.19-24, ⟨10.1145/500001.500006⟩
Communication dans un congrès
hal-00008071v1
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Automatic code-transformations, and architecture rafinement for application-specific multiprocessorKluwer Academic Publishers, pp.193-204, 2002, ⟨10.1007/978-0-387-35597-9_17⟩
Ouvrages
hal-00179000v1
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Maintaining Communication Consistency during Task Migrations in Heterogeneous Reconfigurable DevicesMulti-Processor System-on-Chip 1: Architectures, wiley, chichester, uk, pp.255-285, 2021, 978-1-789-45021-7
Chapitre d'ouvrage
hal-03194391v1
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Automated Non-Regression Testing for Accelerator Prototyping on FPGAInternational symposium on Rapid System Prototyping (RSP'16), Oct 2016, Pittsbrugh, United States. pp.45-51
Communication dans un congrès
hal-01523887v1
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Communication Consistency for Hardware Context Switch on Heterogeneous FPGAs18th International Forum on MPSoC (MPSoC'2018), Jul 2018, Salt Lake City, United States
Communication dans un congrès
hal-02003336v1
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Mathematical Modeling for NoC resources Estimation on FPGAInternational Journal of Computing and Digital Systems, 2016, 5 (2), pp.1-4. ⟨10.12785/ijcds/050204⟩
Article dans une revue
hal-01334183v1
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Prototyping dynamic task migration on heterogeneous reconfigurable systemsInternational Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, Oct 2017, Seoul, South Korea
Communication dans un congrès
hal-01971312v1
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Linux Synchronization Barrier on MPSoC: Hardware/Software Accurate Study and OptimizationInternational Conference on Application-Specific Systems, Architectures and Processors (ASAP 2018), Jul 2018, Milano, Italy. pp.1-4
Communication dans un congrès
hal-01882560v1
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Transparent and Portable Agent Based Task Migration for Data-Flow Applications on Multi-tiled ArchitecturesInternational Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS'15), Oct 2015, Amsterdam, Netherlands. pp.183 - 192
Communication dans un congrès
hal-01408803v1
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Méthodologie de génération rapide et automatique d’accélérateurs matériels sous contraintes de ressources : progression itérative et gloutonneConférence en Parallélisme, Architecture et Système (ComPAS'13), Jan 2013, Grenoble, France
Communication dans un congrès
hal-01408850v1
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Generating Efficient Context-Switch Capable Circuits Through Autonomous Design FlowACM Transactions on Reconfigurable Technology and Systems (TRETS), 2016, 10 (1), pp.9. ⟨10.1145/2996199⟩
Article dans une revue
hal-01367798v2
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