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96 résultats
Stochastic Modeling for Floating-point to Fixed-point ConversionIEEE Workshop on Signal Processing Systems (SiPS), Oct 2011, Beirut, Lebanon. pp.180-185
Communication dans un congrès
hal-00746791v1
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Ordonnancement Spatio-Temporel 3D minimisant le coût de communications entre tâchesXXIVe Colloque Gretsi - Traitement du Signal et des Images, Sep 2013, Brest, France. pp.1-7
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hal-00921867v1
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A Formal Method for Hardware IP Design and Integration under I/O and Timing ConstraintsACM Transactions on Embedded Computing Systems (TECS), 2006, vol 5, No. 1, pp.29-53. ⟨10.1145/1132357.1132359⟩
Article dans une revue
hal-00077729v1
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Dataflow program implementation onto a heterogeneous multiprocessor platformMETODO, Oct 2014, Madrid, France
Communication dans un congrès
hal-01075481v1
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Towards run-time actor mapping of dynamic dataflow programs onto multi-core platformsInternational Symposium on Image and Signal Processing and Analysis (ISPA), Sep 2013, Trieste, Italy. pp.725 - 730
Communication dans un congrès
hal-00909408v1
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Demo abstract : FPGA-based implementation of a flexible FFT dedicated to LTE standardConference on Design and Architectures for Signal and Image Processing (DASIP), Demo Night, Oct 2016, Rennes, France. , Conference on Design and Architectures for Signal and Image Processing (DASIP), Demo Night, pp.2, 2016
Poster de conférence
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Electronic System Level to Hw/Sw Design Flow2004, pp.1-6
Communication dans un congrès
hal-00079258v1
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Synthèse de haut niveau en tenant compte de la dynamique des traitementsRevue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2008, 27 (9), pp.1129-1154
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hal-00389847v1
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Determination of a specialized processor for the resolution of linear systems arising in the application of the finite element methodJournal de Physique III, 1993, 3 (3), pp.531-538. ⟨10.1051/jp3:1993146⟩
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istex
jpa-00248938v1
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Improving the CubeSat Reliability Thanks to a Multiprocessor System using Fault Tolerant Online SchedulingMicroprocessors and Microsystems: Embedded Hardware Design , 2021, 85, pp.1-12. ⟨10.1016/j.micpro.2021.104312⟩
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Comparison of Enhancing Methods for Primary/Backup Approach Meant for Fault Tolerant Scheduling[Research Report] Univ Rennes, Inria, CNRS, IRISA, France. 2021
Rapport
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Efficient Software Synthesis of Dynamic Dataflow ProgramsICASSP 2014, May 2014, Florence, Italy. pp.1
Communication dans un congrès
hal-00988003v1
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A Computation Core for Communication Refinement of Digital Signal Processing AlgorithmsDSD '06: Proceedings of the 9th EUROMICRO Conference on Digital System Design, Aug 2006, Cavtat, Croatia. pp.240--250
Communication dans un congrès
hal-00332396v1
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Design of a Flexible 2-D Discrete Wavelet Transform IP Core for JPEG2000 Image Coding in Embedded Imaging SystemsSignal Processing, 2006, 86 (7), pp.1375-1399
Article dans une revue
inria-00477376v1
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Place Reservation Technique for Online Task Placement on a Multi-context Heterogeneous Reconfigurable ArchitectureInternational Conference on Reconfigurable Computing and FPGAs (ReConFig 2014), Dec 2014, Cancun, Mexico. pp.6
Communication dans un congrès
hal-01076691v1
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Bit-Width Optimizations for High-level Synthesis of Digital Signal Processing Systems2006, pp.180
Communication dans un congrès
hal-00104966v1
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SWP for multimedia operator designSETIT Conference, Sciences of Electronic, Technologies of Information and Telecommunications, Hammamet, Tunisia, Mar 2009, Hammamet, Tunisia
Communication dans un congrès
inria-00432578v1
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An efficient algorithm for custom instruction enumerationGreat lakes symposium on VLSI, May 2011, Lausanne, Switzerland
Communication dans un congrès
hal-00746760v1
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High-Level Synthesis for the Design of FPGA-based Signal Processing SystemsIEEE International Symposium on Systems, Architectures, Modeling, and Simulation Conference (SAMOS'09), Jul 2009, Samos, Greece. pp.000
Communication dans un congrès
hal-00389864v1
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Embedded Multi-Core Systems Dedicated to Dynamic Dataflow ProgramsJournal of Signal Processing Systems, 2015, 80 (1), pp.121-136. ⟨10.1007/s11265-014-0953-5⟩
Article dans une revue
hal-01078142v1
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COMPA backend : Runtime dynamique pour l’exécution de programmes flot de données sur plates-formes multiprocesseursCOMPAS 2015 : - Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2015, Lille, France. pp.1-9
Communication dans un congrès
hal-01167037v1
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Evaluation of the Fault-Tolerant Online Scheduling Algorithms for CubeSatsDSD 2020 - 23rd EUROMICRO Conference on Digital System Design, Aug 2020, Portoroz, Slovenia. pp.1-11
Communication dans un congrès
hal-02927553v1
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Efficient multicore scheduling of dataflow process networksIEEE Workshop on Signal Processing Systems (SiPS), Oct 2011, Beyrouth, Lebanon. pp.198 - 203, ⟨10.1109/SiPS.2011.6088974⟩
Communication dans un congrès
hal-00687750v1
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Pipelined memory controllers for DSP real time applications handling unpredictable data accessesthe European Signal Processing Conference (EUSIPCO'05), Sep 2005, Antalya, Turkey. pp.000
Communication dans un congrès
hal-00179898v1
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Design and synthesis of behavioral level virtual components2001, pp.23-28
Communication dans un congrès
hal-00077881v1
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Efficient Maximal Convex Custom Instruction Enumeration for Extensible ProcessorsConference on Design and Architectures for Signal and Image Processing (DASIP), Nov 2011, Tampere, Finland
Communication dans un congrès
hal-00746777v1
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Spécification et conception de systèmes sur puce : SystemC et approches actuelles3èmes journées scientifiques des jeunes chercheurs en Génie Electrique et Informatique, 2003, Mahdia, Tunisie
Communication dans un congrès
hal-00105043v1
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A Coarse-Grain Reconfigurable Hardware Architecture for RVC-CAL-based DesignDesign and Architectures for Signal and Image Processing, Oct 2010, Edinburgh, United Kingdom
Communication dans un congrès
inria-00554250v1
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Near-optimal Energy-Efficient Partial-Duplication Mapping of Real-Time Parallel ApplicationsAEiC 2022 - 26th Ada-Europe International Conference on Reliable Software Technologies, Jun 2022, Ghent, Belgium. pp.1-26
Communication dans un congrès
hal-03907727v1
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Fault-Tolerant Online Scheduling Algorithms for CubeSatsPARMA-DITAM’20 - 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architecture, 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, Jan 2020, Bologna, Italy
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hal-02461164v1
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