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56 résultats
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triés par
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Bee+Cl@k: An Implementation of Lattice-Based Array Contraction in the Source-to-Source Translator ROSEACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), Jun 2007, San Diego, United States. ⟨10.1145/1273444.1254778⟩
Communication dans un congrès
hal-03106126v1
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Rank: a tool to check program termination and computational complexityConstraints in Software Testing Verification and Analysis, Mar 2013, Luxembourg
Communication dans un congrès
hal-00801571v1
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fkcc: the Farkas Calculator[Research Report] RR-9313, Inria. 2019
Rapport
hal-02414224v1
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High-Level Synthesis of Pipelined FSM from Loop Nests[Research Report] 8900, INRIA. 2016, pp.18
Rapport
hal-01301334v2
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On the Verification of Polyhedral Program TransformationsHPCS 2020 - 18th International Conference on High Performance Computing & Simulation, CADO 2020 - 3rd Special Session on Compiler Architecture, Design and Optimization, Oct 2020, Barcelona, Spain. pp.1-8
Communication dans un congrès
hal-03106070v1
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Rephrasing Polyhedral Optimizations with Trace Analysis12th International Workshop on Polyhedral Compilation Techniques (IMPACT'22), Jun 2022, Budapest, Hungary
Communication dans un congrès
hal-03862218v1
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Program Termination and Worst Time Complexity with Multi-Dimensional Affine Ranking Functions[Research Report] 2009, pp.31
Rapport
inria-00434037v1
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Contributions to Program Optimization and High-Level SynthesisHardware Architecture [cs.AR]. ENS de Lyon, 2019
HDR
tel-02151877v2
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Optimisation de programmes par reconnaissance de templatesCalcul parallèle, distribué et partagé [cs.DC]. Université de Versailles Saint-Quentin-en-Yvelines, 2005. Français. ⟨NNT : ⟩
Thèse
tel-01892198v1
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A Polyhedral Approach for Scalar Promotion2021
Pré-publication, Document de travail
hal-03449994v1
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Farkas Lemma made easy10th International Workshop on Polyhedral Compilation Techniques (IMPACT 2020), Jan 2020, Bologna, Italy. pp.1-6
Communication dans un congrès
hal-02422033v1
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FADAlib: an open source C++ library for fuzzy array dataflow analysisLogiciel hal-03445991v1 |
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Estimation of Parallel Complexity with Rewriting TechniquesWorkshop on Termination, Sep 2016, Obergurgl, Austria
Communication dans un congrès
hal-01345914v1
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A Compiler Algorithm to Guide Runtime Scheduling[Research Report] RR-9315, INRIA Grenoble; INRIA Bordeaux - Sud-Ouest. 2019
Rapport
hal-02421327v1
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Automatic Generation of FPGA-Specific Pipelined AcceleratorsInternational Symposium on Applied Reconfigurable Computing (ARC'11), Mar 2011, Belfast, United Kingdom
Communication dans un congrès
ensl-00549682v1
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CART: Constant Aspect Ratio Tiling4th International Workshop on Polyhedral Compilation Techniques (IMPACT’14), Jan 2014, Vienna, Austria
Communication dans un congrès
hal-00915827v1
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Lattice-Based Array Contraction: From Theory to Practice[Research Report] LIP RR-2007-44, LIP - Laboratoire de l’Informatique du Parallélisme. 2007
Rapport
hal-02127064v1
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Region Array SSAACM/IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT'06), Sep 2006, Seattle, United States
Communication dans un congrès
hal-03106226v1
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Improving Communication Patterns in Polyhedral Process Networks[Research Report] RR-9131, INRIA Grenoble - Rhône-Alpes. 2017, pp.1-13
Rapport
hal-01665155v1
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FIFO Recovery by Depth-Partitioning is Complete on Data-aware Process Networks[Research Report] RR-9187, INRIA Grenoble - Rhone-Alpes. 2018
Rapport
hal-01818585v1
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Lightweight Array Contraction by Trace-Based Polyhedral AnalysisC3PO 2022 - International Workshop on Compiler-assisted Correctness Checking and Performance Optimization for HPC, Jun 2022, Hamburg, Germany
Communication dans un congrès
hal-03862219v1
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On Channel Restructuring for Complete FIFO RecoveryICCD 2019 - 37th IEEE International Conference on Computer Design, Nov 2019, Abu Dhabi, United Arab Emirates
Poster de conférence
hal-02433318v1
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Optimizing DDR-SDRAM Communications at C-level for Automatically-Generated Hardware AcceleratorsIEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'10), Jul 2010, Rennes, France
Communication dans un congrès
hal-01664033v1
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fkcc: the Farkas CalculatorTAPAS 2019 - 10th Workshop on Tools for Automatic Program Analysis, Oct 2019, Porto, Portugal. pp.526-536
Communication dans un congrès
hal-03106000v1
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Data-aware Process Networks[Rapport de recherche] RR-8735, Inria - Research Centre Grenoble – Rhône-Alpes; INRIA. 2015, pp.32
Rapport
hal-01158726v1
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Partial Evaluation of Dense Code on Sparse StructuresRR-9534, INRIA Lyon; CNRS; ENS de Lyon; Université de Lyon. 2023, pp.16
Rapport
hal-04358187v1
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On Domain Specific Language Re-EngineeringSep 2005
Communication dans un congrès
hal-00141073v1
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TeMa : an Efficient Tool to find High-Performance Library Patterns in Source CodeInternational Workshop on Patterns in High-Performance Computing (PatHPC'05), May 2005, Urbana Champaign, United States
Communication dans un congrès
ensl-01663997v1
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Data-Aware Process NetworksCC 2021 - 30th ACM SIGPLAN International Conference on Compiler Construction, Mar 2021, Virtual, South Korea. pp.1-11, ⟨10.1145/3446804.3446847⟩
Communication dans un congrès
hal-03143777v1
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Multi-dimensional Rankings, Program Termination, and Complexity Bounds of Flowchart ProgramsStatic Analysis Symposium, Sep 2010, Perpignan, France. ⟨10.1007/978-3-642-15769-1⟩
Communication dans un congrès
inria-00523298v1
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