Benoît Miramond
95
Documents
Présentation
Benoît Miramond est professeur au laboratoire LEAT de l'Université Côte d'Azur à Sophia-Antipolis. Auparavant, il était maître de conférence au laboratoire ETIS de l'Université de Cergy-Pontoise. Benoît Miramond a reçu l'Habilitation (HDR) en sciences de l'ingénieur et des systèmes en 2014 et le titre de doctorat en informatique en 2003.
Il est actuellement à la tête du groupe d'ingénierie neuromorphique eBRAIN du LEAT. Il dirige le projet de recherche suivants :
- projet ANR DeepSee (Deep Spiking Neural Networks for embedded systems) en collaboration avec les entreprises Renault, Prophesee et les laboratoires Cerco et I3S. Le projet se déroule de mars 2021 à septembre 2024.
- projet international ANR SOMA (Architecture de machine auto-organisée basée) en collaboration avec l'INRIA de Bordeaux, le LORIA de Nancy et l'HESSO de Genève de 2018 à 2022.
Dans ce contexte, ses recherches suivent une approche interdisciplinaire pour explorer de nouvelles architectures matérielles adaptatives et faible consommation inspirées des neurosciences et des sciences cognitives pour des applications d'Intelligence Artificielle embarquée.
Plus de détails sur [http://sites.unice.fr/site/bmiramond/Perso/](http://sites.unice.fr/site/bmiramond/Perso/ "Page web Miramond")
Benoît Miramond is Full Professor at LEAT Lab in the Université Côte d'Azur in Sophia-Antipolis. Previously, from 2005 to 2015, he was Associate Professor in the ETIS Lab in the University of Cergy-Pontoise. Benoît Miramond received the Habilitation thesis in sciences of engineering and systems in 2014 and the title of PhD in computer sciences in 2003.
He is currently the head of the eBRAIN research group in Neuromorphic Engineering from LEAT lab. He is leader of the following research projects :
- international ANR project SOMA (neural-based Self-Organizing Machine Architecture) in collaboration with INRIA at Bordeaux, LORIA at Nancy and HESSO in Geneva from 2018 to 2021.
- ANR DeepSee (Deep Spiking Neural Networks for Embedded and Autonomous systems) with Renault, Prophesee and the resarch labs Cerco and I3S. The project goes from march 2021 to september 2024.
In this context, his research is following an interdisciplinary approach to explore novel adaptive and low-power hardware architectures inspired from neurosciences and cognitive sciences for embedded AI applications.
More details: [http://sites.unice.fr/site/bmiramond/Perso/](http://sites.unice.fr/site/bmiramond/Perso/ "Web Page for Miramond Benoit")
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Time series prediction and anomaly detection with recurrent spiking neural networksIJCNN 2023, IEEE, Jun 2023, Queensland, Australia. pp.10, ⟨10.1109/IJCNN54540.2023.10191614⟩
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Next generation of Edge AI with spiking neural networks on event-based neuromorphic hardwareGDR Biocomp, Nov 2023, Banuyls-sur-Mer, France
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Estimation of Energy Efficiency of Spiking Neural Networks on neuromorphic hardwareConférence INT, Iinstitut de Neurosciences de la Timone, Mar 2023, Marseille (13), France
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Cortex Inspired Learning to Recover Damaged Signal Modality by ReD-SOM ModelIJCNN 2023, IEEE, Jun 2023, Gold Coast, Australia, Australia. pp.01-09, ⟨10.1109/IJCNN54540.2023.10191701⟩
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Embedded Artificial Neural Network for Data Prediction in Energy Efficient Wireless Sensors Networks4rd International Conference on Advances in Signal Processing and Artificial Intelligence (ASPAI' 2022), Oct 2022, Corfu, Greece. pp.2
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An Analytical Estimation of Spiking Neural Networks Energy EfficiencyInternational Conference on Neural Information Processing ( ICONIP), Nov 2022, ITT Indore, India. pp.8, ⟨10.1007/978-3-031-30105-6_48⟩
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Objects classification based on UWB scattered field and SEM data using machine learning algorithmsEuropean Radar Conference 2021, Apr 2022, Londres, United Kingdom. pp.369-372, ⟨10.23919/EuRAD50154.2022.9784460⟩
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Learning from Event Cameras with Sparse Spiking Convolutional Neural NetworksInternational Joint Conference On Neural Networks 2021 (IJCNN 2021), Jul 2021, Conférence virtuelle, China. pp.1-8
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Vers une approche bio-inspirée de l’IA embarquée15ème Colloque National du GDR SOC2, Jun 2021, distanciel, France
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Neuromorphic architectures, a support to third generation of Artificial Neural Networks and a new path toward low-power embedded AIMicro Innovation Day II, pôle SCS., Oct 2021, Marseille, France
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Self-Organizing Neurons: Toward Brain-Inspired Multimodal AssociationNeural Interfaces and Artificial Senses (NIAS), Sep 2021, Online, Spain. pp.1, ⟨10.29363/nanoge.nias.2021.007⟩
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GPU-based Self-Organizing-Maps for Post-Labeled Few-Shot Unsupervised LearningInternational Conference on Neural Information Processing (ICONIP) 2020, Aug 2020, Bangkok, Thailand. pp.404-416, ⟨10.1007/978-3-030-63833-7_34⟩
Communication dans un congrès
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Dynamic Structural and Computational Resource Allocation for Self-Organizing ArchitecturesICECS 2020, Nov 2020, Glasgow, United Kingdom. pp.1-4, ⟨10.1109/ICECS49266.2020.9294983⟩
Communication dans un congrès
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Improving Self-Organizing Maps with Unsupervised Feature ExtractionInternational Conference on Neural Information Processing (ICONIP) 2020, Aug 2020, Bangkok, Thailand. pp.474-486
Communication dans un congrès
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Neural coding: adapting spike generation for embedded hardware classificationIEEE World Congress on Computational Intelligence (WCCI) 2020, Jul 2020, Glasgow, United Kingdom. pp.8, ⟨10.1109/IJCNN48605.2020.9207702⟩
Communication dans un congrès
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An FPGA-based Hybrid Neural Network accelerator for embedded satellite image classificationIEEE International Symposium on Circuit and Systems (ISCAS 2020), May 2020, Seville, Spain. pp.5, ⟨10.1109/ISCAS45731.2020.9180625⟩
Communication dans un congrès
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Spike Nets for low power image processing4th Huawei Future ISP (Image Signal Processing) technologies workshop, Sep 2020, Sophia Antipolis, France
Communication dans un congrès
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Toward unsupervised Human Activity Recognition on Microcontroller Unitsconférence Euromicro DSD 2020, Aug 2020, Portorož, Slovenia. pp.9, ⟨10.1109/DSD51259.2020.00090⟩
Communication dans un congrès
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Energy consumption minimization on LoRaWAN sensor network by using an Artificial Neural Network based applicationSensors Applications Symposium 2019, Mar 2019, Sophia-Antipolis, France. pp.1-6, ⟨10.1109/SAS.2019.8705992⟩
Communication dans un congrès
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Specialized visual sensor coupled to a dynamic neural field for embedded attentional process2019 IEEE Sensors Applications Symposium (SAS) (SAS 2019), Mar 2019, Sophia-Antipolis, France. pp.1-6
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Information coding and hardware architecture of spiking neural networksEuromicro DSD/SEAA 2019, Aug 2019, Kallithea,Chalkidiki, Greece. pp.291-298, ⟨10.1109/DSD.2019.00050⟩
Communication dans un congrès
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Self-organizing neurons: toward brain-inspired unsupervised learningThe International joint Conference On Neural Networks, Jul 2019, Budapest, Hungary. pp.1-9, ⟨10.1109/IJCNN.2019.8852098⟩
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Synchronous Approach for Modeling Spiking Neurons2019 IEEE Biomedical Circuits and Systems Conference BIOCAS 2019, Oct 2019, Nara, Japan. pp.1-4, ⟨10.1109/BIOCAS.2019.8919084⟩
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QoS and Energy-Aware Run-time Adaptation for Mobile Robotic Missions: A Learning ApproachInternational Conference on Robotic Computing, 2019., Feb 2019, Naples, Italy. pp.212-219, ⟨10.1109/IRC.2019.00039⟩
Communication dans un congrès
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Pruning Self-Organizing Maps for Cellular Hardware ArchitecturesAHS 2018 - 12th NASA/ESA Conference on Adaptive Hardware and Systems, Aug 2018, Edinburgh, United Kingdom. pp.272-279, ⟨10.1109/AHS.2018.8541465⟩
Communication dans un congrès
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Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies26th IFIP IEEE International Conference on Very Large Scale Integration (VLSI SOC 2018), Oct 2018, Verona, Italy. pp.176-179, ⟨10.1109/VLSI-SoC.2018.8644897⟩
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A distributed cellular approach of large scale SOM models for hardware implementationIEEE Conference on Image Processing and Signals (IPAS), Dec 2018, Nice (sophia-antipolis), France. pp.250-255, ⟨10.1109/IPAS.2018.8708904⟩
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Confronting machine-learning with neuroscience for neuromorphic architectures designIEEE WORLD CONGRESS ON COMPUTATIONAL INTELLIGENCE, Jul 2018, Rio de Janeiro, Brazil. pp.1-8, ⟨10.1109/IJCNN.2018.8489241⟩
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Neuromorphic hardware as a self-organizing computing systemWCCI 2018 - IEEE World Congress on Computational Intelligence, Workshop NHPU : Neuromorphic Hardware In Practice and Use, Jul 2018, Rio de Janeiro, Brazil. pp.1-4
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Energy Saving in a Wireless Sensor Network by Data Prediction by using Self-Organized MapsInternational Workshop on Recent Advances in Cellular Technologies and 5G for IoT Environments (RACT-5G-IoT 2018), May 2018, Porto, Portugal. pp.1090-1095, ⟨10.1016/j.procs.2018.04.161⟩
Communication dans un congrès
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Towards A Multi-Mission QoS and Energy Manager for Autonomous Mobile RobotsInternational Conference on Robotic Computing, Jan 2018, Laguna Hill, CA, United States. pp.270-273, ⟨10.1109/IRC.2018.00057⟩
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Optimizing Application Distribution on Multi-Core Systems within AUTOSAR8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Jan 2016, TOULOUSE, France. pp.10
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Distribution of Real-Time Software on Multi-Core Architectures in Automotive SystemsConférence d'informatique en Parallélisme, Architecture et Système (COMPAS), Jul 2016, Lorient, France. pp.2
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FPGA-based bio-inspired architecture for multi-scale attentional visionConference on Design & Architectures for Signal & Image Processing (DASIP), Oct 2016, Rennes, France. pp.231-232, ⟨10.1109/DASIP.2016.7853828⟩
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Real-Time Software Distribution on Multi-Core Architectures in Automotive SystemsColloque GDR SoC-SiP (System On Chip - System In Package), Jun 2016, Nantes, France
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Generation of Schedule Tables on Multi-core Systems for AUTOSAR ApplicationsConference on Design & Architectures for Signal & Image Processing (DASIP), Oct 2016, Rennes, France. pp.191-198, ⟨10.1109/DASIP.2016.7853818⟩
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Attention-based smart-camera for spatial cognition10th International Conference on Distributed Smart Cameras (ICDSC 2016), Sep 2016, Paris, France. pp.121-127, ⟨10.1145/2967413.2967440⟩
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A neural processing unit for self-organizing mapsworkshop on "Neuromorphic and Brain-Based Computing Systems", Mar 2015, Grenoble, France
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Validation of neural networks onto FPGAInternational Workshop on Neuromorphic and Brain-Based Computing Systems (NeuComp 2013 / DATE), DATE, Mar 2013, Grenoble, France
Communication dans un congrès
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Hardware architecture of Self-Organizing MapsDesign, Automation & Test in Europe (DATE 2013) - International Workshop on Neuromorphic and Brain-Based Computing Systems (NeuComp 2013), Mar 2013, Grenoble, France
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A Neural Model for Hardware Plasticity in Artificial Vision SystemsDesign and Architectures for Signal and Image Processing (DASIP), 2013 Conference on, ECSI, Oct 2013, Cagliari, Italy. pp.30 - 37
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Embodied Computing: Self-adaptation in Bio-inspired Reconfigurable ArchitecturesParallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2012 IEEE 26th International, May 2012, Shanghai, China. pp.413 - 418, ⟨10.1109/IPDPSW.2012.52⟩
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FPGA-based vision perception architecture for robotic missionsSmart cameras for robotic applications, Oct 2012, Portugal. pp.4
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Self-organization in embodied reconfigurable architectures.Colloque GDR SocSip 2012, Jun 2012, Paris, France. pp.1-2
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Middleware Based Executive for Embedded Reconfigurable PlatformsDASIP, Oct 2012, Germany. pp.6
Communication dans un congrès
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Self-organization of reconfigurable processing elements during mobile robots missionsReconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011 6th International Workshop on, Jun 2011, Montpellier, France. ⟨10.1109/ReCoSoC.2011.5981533⟩
Communication dans un congrès
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Self-organization of reconfigurable processing elements during mobile robots missions6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2011, Jun 2011, Montpellier, France. pp.1-2
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Dataflow Programming Model For Reconfigurable Computing6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Jun 2011, Montpellier, France. pp.1-8, ⟨10.1109/ReCoSoC.2011.5981505⟩
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Generation of static tables in embedded memory with dense schedulingConference on Design and Architectures for Signal and Image Processing, Oct 2010, France. pp.1
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SystemC multiprocessor RTOS model for services distribution on MPSoC platformsConference on Design and Architectures for Signal and Image Processing (DASIP), Nov 2008, Bruxelles, Belgium. pp.1
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A Framework for the Exploration of RTOS Dedicated to the Management of Hardware Reconfigurable ResourcesReConFig'08, 2008, Mexico. pp.61-66
Communication dans un congrès
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Dynamic adaptation of Hardware-Software scheduling for Reconfigurable System-on-Chip19th IEEE/IFIP International Symposium on Rapid System Prototyping (RSP'08), Jun 2008, Monterey, CA, United States. pp.1
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A Modular SystemC RTOS Model for Embedded Services Exploration1st European Workshop on Design and Architectures for Signal and Image Processing (DASIP'07), Nov 2007, Grenoble, France. pp.1
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Design Space Exploration for Dynamically Reconfigurable ArchitecturesDATE'05, Mar 2005, Munich, Germany. pp.366-371
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Design Space Exploration for Dynamically Reconfigurable ArchitecturesIEEE DATE 2005, 2005, Germany. pp.366--371, ⟨10.1109/DATE.2005.118⟩
Communication dans un congrès
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Decision Guide Environment for Design Space ExplorationETFA 2005, 2005, Italy. pp.881--888, ⟨10.1109/ETFA.2005.1612618⟩
Communication dans un congrès
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ModelJ : Component-based Modeling for Embedded SystemsEuropean Conference on Object Oriented Programming (ECOOP’2001), Jun 2001, Budapest, Hungary
Communication dans un congrès
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Space Use-Case: Onboard Satellite Image Classificationspringer. Towards Ubiquitous, Low-power Image Processing Platforms, , pp.199-218, 2020, 978-3-030-53532-2. ⟨10.1007/978-3-030-53532-2_12⟩
Chapitre d'ouvrage
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SystemC Multiprocessor RTOS model for services distribution on RTOS platformsSpringer. Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing, pp.197-216, 2011, ⟨10.1007/978-90-481-9965-5_9⟩
Chapitre d'ouvrage
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Déclaration d’Invention DI-14851-01 du logiciel MicroAIFrance, N° de brevet: DI-14851-01. EDGE. 2021
Brevet
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Off-line allocation method of embedded and real-time software on a multicore architecture and its use for embedded applications in automotive vehicleFrance, Patent n° : PCT/FR2016/053578, Reference MFR9019 PCT, 2016. MCSOC. 2016
Brevet
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Procédé hors-ligne d'allocation d'un logiciel embarqué temps réel sur une architecture microcontrôleur multicoeur et son utilisation pour des applications embarquées dans un véhicule automobileFrance, Patent n° : No 3 045 870. Reference 15 62954, 2016. MCSOC. 2016
Brevet
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Written and spoken digits database for multimodal learning2019
Autre publication scientifique
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Malvoyance: des lunettes pour raconter le monde2019
Autre publication scientifique
hal-02078741v1
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Hardware vision architecture for autonomous navigationGDR Soc-Sip, 2013
Autre publication scientifique
hal-02533050v1
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Generalization Ability of Deep Learning Algorithms Trained using SEM Data for Objects Classification2021
Pré-publication, Document de travail
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Brain-inspired self-organization with cellular neuromorphic computing for multimodal unsupervised learning2020
Pré-publication, Document de travail
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Architectural exploration of hardware Spiking Neural Networks integrating Non-Volatile Memories[Internship report] Université de Nice Sophia-Antipolis (UNS). 2018
Rapport
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