Filtrer vos résultats
- 9
- 7
- 13
- 2
- 1
- 16
- 1
- 1
- 2
- 2
- 5
- 3
- 1
- 1
- 15
- 1
- 9
- 8
- 6
- 4
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 16
- 7
- 6
- 5
- 4
- 4
- 4
- 2
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
16 résultats
|
|
|
triés par
|
|
|
State space reduction strategies for model checking concurrent C programs9th Workshop on Verification and Evaluation of Computer and Communication Systems, VECoS 2015, Sep 2015, Bucharest, Romania. pp.65-75
Communication dans un congrès
cea-01844041v1
|
||
QuaRTOS-DSE: A Tool for Design Space Exploration of Embedded Real-Time System2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC), May 2018, Singapore, France. pp.42-50, ⟨10.1109/ISORC.2018.00014⟩
Communication dans un congrès
hal-02060014v1
|
|||
|
|
Towards Time-triggered Component-based System ModelsICSEA15, The Tenth International Conference on Software Engineering Advances, Nov 2015, Barcelone, Spain. pp.157-169
Communication dans un congrès
hal-01242605v1
|
||
|
|
Towards Correct Transformation: From High-Level Models to Time-Triggered ImplementationsRTAS, Apr 2016, Vienna, Austria. pp.13
Communication dans un congrès
hal-01306466v1
|
||
|
|
C2TLA+ : Traduction automatique du code C vers TLA+École d’Été Temps Réel 2013, Aug 2013, Toulouse, France
Communication dans un congrès
hal-01314832v1
|
||
|
|
Preface to the VECoS 2020 & 2021 special issue of ISSEInnovations in Systems and Software Engineering, 2023, ⟨10.1007/s11334-023-00543-0⟩
Article dans une revue
hal-04398756v1
|
||
Scalable Detection of Amplification Timing Anomalies for the Superscalar TriCore ArchitectureInternational Conference on Formal Methods for Industrial Critical Systems, Sep 2020, Vienna, Austria
Communication dans un congrès
hal-03022552v1
|
|||
|
|
Externalisation of Time-Triggered communication system in BIP high level models8th Junior Researcher Workshop on Real-Time Computing (JRWRTC 2014), Oct 2014, Versailles, France. pp.47-50
Communication dans un congrès
hal-01242608v1
|
||
Specifying and Verifying Concurrent C Programs with TLA+Formal Techniques for Safety-Critical Systems, 476, Springer, pp.206-222, 2015, Communications in Computer and Information Science
Chapitre d'ouvrage
hal-01242954v1
|
|||
Specifying and Verifying Concurrent C Programs with TLA+The 3rd International Workshop on Formal Techniques for Safety-Critical Systems (FTSCS'14)., Nov 2014, X, France. pp.12-25
Communication dans un congrès
hal-01126566v1
|
|||
State Space Reduction Strategie for Model Checking Concurrent C Programs9th Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS'15), 2015, Bucharest, Romania. pp.65-76
Communication dans un congrès
hal-01242951v1
|
|||
|
|
Model-compilation challenges [for Cyber-Physical systems (CPS)]8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Jan 2016, TOULOUSE, France
Communication dans un congrès
hal-01292315v1
|
||
Formal modelling framework of data acquisition software using a synchronous approach for timing analysis30th IFAC Workshop on Real-Time Programming and 4th International Workshop on Real-Time Software (WRTP/RTS'09), Oct 2009, Mrągowo, Poland. pp.1-8
Communication dans un congrès
hal-00412224v1
|
|||
|
|
Verifying and Constructing Abstract TLA Specifications: Application to the Verification of C programsTenth International Conference on Software Engineering Advances (ISCEA 2015), Nov 2015, Barcelone, Spain
Communication dans un congrès
hal-01501469v1
|
||
|
|
An Approach for Verifying Concurrent C Programs8th Junior Researcher Workshop on Real-Time Computing, Oct 2014, Versailles, France. pp.33-36
Communication dans un congrès
hal-01315749v1
|
||
|
|
TT-BIP: using correct-by-design BIP approach for modelling real-time system with time-triggered paradigmInnovations in Systems and Software Engineering, 2018, 14 (2), pp.117 - 142. ⟨10.1007/s11334-018-0312-y⟩
Article dans une revue
hal-01823749v1
|