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Cost Effective Physical Register Sharing

Arthur Perais , André Seznec
International Symposium on High Performance Computer Architecture, IEEE, Mar 2016, Barcelona, Spain. ⟨10.1109/HPCA.2016.7446105⟩
Communication dans un congrès hal-01259137v2

A gem5-based CVA6 Framework for Microarchitectural Pathfinding

Pierre Ravenel , Arthur Perais , Benoît Dupont de Dinechin , Frédéric Pétrot
RISC-V Summit Europe 2023, Jun 2023, Barcelona, Spain
Poster de conférence hal-04161617v1
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Branch Target Buffer Organizations

Arthur Perais , Rami Sheikh
56th IEEE/ACM International Symposium on Microarchitecture (MICRO 2023), IEEE; ACM, Oct 2023, Toronto, Canada. ⟨10.1145/3613424.3623774⟩
Communication dans un congrès hal-04234792v1
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EOLE: Paving the Way for an Effective Implementation of Value Prediction

Arthur Perais , André Seznec
International Symposium on Computer Architecture, ACM/IEEE, Jun 2014, Minneapolis, MN, United States. pp.481 - 492, ⟨10.1109/ISCA.2014.6853205⟩
Communication dans un congrès hal-01088130v1
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BeBoP: A Cost Effective Predictor Infrastructure for Superscalar Value Prediction

Arthur Perais , André Seznec
International Symposium on High Performance Computer Architecture, IEEE, Feb 2015, San Francisco, United States. pp.13 - 25 ), ⟨10.1109/HPCA.2015.7056018⟩
Communication dans un congrès hal-01193175v1
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EOLE: Paving the Way for an Effective Implementation of Value Prediction

Arthur Perais , André Seznec
[Research Report] RR-8402, INRIA. 2013, pp.25
Rapport hal-00907973v2
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Revisiting Value Prediction

Arthur Perais , André Seznec
[Research Report] RR-8155, INRIA. 2012, pp.22
Rapport hal-00758713v1
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Register Sharing for Equality Prediction

Arthur Perais , Fernando A. Endo , André Seznec
International Symposium on Microarchitecture, Oct 2016, Taipei, Taiwan
Communication dans un congrès hal-01354267v1
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Take A Way: Exploring the Security Implications of AMD’s Cache Way Predictors

Moritz Lipp , Vedad Hadžić , Michael Schwarz , Arthur Perais , Clémentine Maurice , et al.
15th ACM Asia Conference on Computer and Communications Security, Oct 2020, Taipei, Taiwan. ⟨10.1145/3320269.3384746⟩
Communication dans un congrès hal-02866777v1
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Leveraging Targeted Value Prediction to Unlock New Hardware Strength Reduction Potential

Arthur Perais
IEEE/ACM International Symposium on Microarchitecture (MICRO 2021), Oct 2021, Athens, Greece. ⟨10.1145/3466752.3480050⟩
Communication dans un congrès hal-03325303v1
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Long Term Parking (LTP): Criticality-aware Resource Allocation in OOO Processors

Andreas Sembrant , Trevor Carlson , Erik Hagersten , David Black-Shaffer , Arthur Perais , et al.
International Symposium on Microarchitecture, Micro 2015, Dec 2015, Honolulu, United States. pp.11
Communication dans un congrès hal-01225019v1
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EOLE: Combining Static and Dynamic Scheduling through Value Prediction to Reduce Complexity and Increase Performance

Arthur Perais , André Seznec
ACM Transactions on Computer Systems, 2016, 34, pp.1-33. ⟨10.1145/2870632⟩
Article dans une revue hal-01259139v1

High Performance General Purpose Architecture and Microarchitecture

Arthur Perais
2022
Autre publication scientifique hal-04161879v1
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On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE

Fernando Endo , Arthur Perais , André Seznec
ACM Transactions on Architecture and Code Optimization, 2017
Article dans une revue hal-01519869v1
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EOLE: Toward a Practical Implementation of Value Prediction

Arthur Perais , André Seznec
IEEE Micro, 2015, Micro's Top Picks from the 2014 Computer Architecture Conferences, 35 (3), pp.114 - 124. ⟨10.1109/MM.2015.45⟩
Article dans une revue hal-01193287v1

We had 64-bit, yes. What about second 64-bit?

Mathieu Bacou , Adam Chader , Chandana S. Deshpande , Christian Fabre , César Fuguet , et al.
RISC-V Summit Europe 2023, Jun 2023, Barcelona, Spain. 2023
Poster de conférence hal-04161612v1
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Rebasing Microarchitectural Research with Industry Traces

Josué Feliu , Arthur Perais , Daniel A Jiménez , Alberto Ros
2023 IEEE International Symposium on Workload Characterization (IISWC), IEEE, Oct 2023, Ghent, Belgium. ⟨10.1109/IISWC59245.2023.00027⟩
Communication dans un congrès hal-04234887v1
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Increasing the performance of superscalar processors through value prediction

Arthur Perais
Hardware Architecture [cs.AR]. Université de Rennes, 2015. English. ⟨NNT : 2015REN1S070⟩
Thèse tel-01235370v2
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Cost-Effective Speculative Scheduling in High Performance Processors

Arthur Perais , André Seznec , Pierre Michaud , Andreas Sembrant , Erik Hagersten
International Symposium on Computer Architecture, ACM/IEEE, Jun 2015, Portland, United States. pp.247-259, ⟨10.1145/2749469.2749470⟩
Communication dans un congrès hal-01193233v1
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Toward Practical 128-bit General Purpose Microarchitectures

Chandana S. Deshpande , Arthur Perais , Frédéric Pétrot
IEEE Computer Architecture Letters, 2023, 22 (2), pp.81-84. ⟨10.1109/LCA.2023.3287762⟩
Article dans une revue hal-04157369v1
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A Case for Speculative Strength Reduction

Arthur Perais
IEEE Computer Architecture Letters, 2021, 20 (1), pp.22-25. ⟨10.1109/LCA.2020.3048694⟩
Article dans une revue hal-03138881v1
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Cost Effective Speculation with the Omnipredictor

Arthur Perais , André Seznec
PACT '18 - 27th International Conference on Parallel Architectures and Compilation Techniques, Nov 2018, Limassol, Cyprus. ⟨10.1145/3243176.3243208⟩
Communication dans un congrès hal-01888884v1
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Storage-Free Memory Dependency Prediction

Arthur Perais , André Seznec
IEEE Computer Architecture Letters, 2016, pp.1 - 4. ⟨10.1109/LCA.2016.2628379⟩
Article dans une revue hal-01396985v1
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Practical Data Value Speculation for Future High-end Processors

Arthur Perais , André Seznec
[Research Report] RR-8395, INRIA. 2013, pp.21
Rapport hal-00904743v1
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Practical data value speculation for future high-end processors

Arthur Perais , André Seznec
International Symposium on High Performance Computer Architecture, IEEE, Feb 2014, Orlando, FL, United States. pp.428 - 439, ⟨10.1109/HPCA.2014.6835952⟩
Communication dans un congrès hal-01088116v1
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Exploring Instruction Fusion Opportunities in General Purpose Processors

Sawan Singh , Arthur Perais , Alexandra Jimborean , Alberto Ros
55th IEEE/ACM International Symposium on Microarchitecture (MICRO 2022), Oct 2022, Chicago, United States. ⟨10.1109/MICRO56248.2022.00026⟩
Communication dans un congrès hal-03856365v1
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Free Atomics: Hardware Atomic Operations Without Fences

Ashkan Asgharzadeh , Juan M. Cebrian , Arthur Perais , Stefanos Kaxiras , Alberto Ros
International Symposium on Computer Architecture (ISCA 2022), Jun 2022, New-York, United States. pp.1-13, ⟨10.1145/3470496.3527385⟩
Communication dans un congrès hal-03719531v1