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Amer BAGHDADI
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Documents
Identifiants chercheurs
- amer-baghdadi
- 0000-0002-6181-6500
- IdRef : 067318398
Présentation
**Amer Baghdadi** is a Professor at IMT Atlantique. He received his Engineering degree in 1998, Master of Science degree in the same year and PhD degree in 2002, all from Grenoble INP (Institut National Polytechnique), France. Furthermore, he received the accreditation to supervise research (HDR) in Sciences and Technologies of Information and Communication in 2012 from the University of Southern Brittany, France.
His general technical area concerns both theoretical and practical aspects, and both algorithm development for digital baseband components and corresponding hardware/software implementations and digital circuit design. His research activities target mainly digital communication applications, in addition to other application domains, and more particularly the design of flexible digital physical layer for future wireless communication standards and terminals. Prof. Baghdadi is IEEE Senior Member. He serves on the technical program committee for several international conferences. He co-authored more than 100 papers on scientific journals and proceedings of international conferences.
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Flexible architectures for LDPC decoders based on network on chip paradigmDSD 2009 : 12th Euromicro Conference on Digital System Design, Sep 2009, Patras, Greece
Communication dans un congrès
hal-00423917v1
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FPGA prototypes for turbo communication applicationsUniversity Booth of DATE 09 : Design, Automation & Test in Europe Conference & Exhibition, Apr 2009, Nice, France
Communication dans un congrès
hal-01841144v1
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On-chip communication network for flexible multiprocessor turbo decodingICTTA '08 : 3d International Conference on Information and Communication Technologies : From Theory to Applications, Apr 2008, Damas, Syria. pp.1 - 6
Communication dans un congrès
hal-02194798v1
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Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoderDAC 2008 : 45th ACM/IEEE design automation conference, Jun 2008, Anaheim, United States. pp.429 - 434, ⟨10.1109/DAC.2008.4555856⟩
Communication dans un congrès
hal-02194802v1
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Binary de Bruijn interconnection network for a flexible LDPC/turbo decoderIEEE International Symposium on Circuits and Systems (ISCAS 2008), May 2008, Seattle, WA, United States. pp.97-100, ⟨10.1109/ISCAS.2008.4541363⟩
Communication dans un congrès
hal-02194923v1
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Flexible and scalable on-chip communication network for multiprocessor turbo decodingPremier Colloque National du GDR SOC-SIP, Jun 2007, Paris, France
Communication dans un congrès
hal-02280094v1
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Butterfly and benes-based on-chip communication networks for multiprocessor turbo decodingDATEC 2007 : Design, Automation & Test in Europe Conference & Exhibition, Apr 2007, Nice, France. pp.654 - 659
Communication dans un congrès
hal-02194929v1
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