Accéder directement au contenu

Amer BAGHDADI

11
Documents
Identifiants chercheurs

Présentation

**Amer Baghdadi** is a Professor at IMT Atlantique. He received his Engineering degree in 1998, Master of Science degree in the same year and PhD degree in 2002, all from Grenoble INP (Institut National Polytechnique), France. Furthermore, he received the accreditation to supervise research (HDR) in Sciences and Technologies of Information and Communication in 2012 from the University of Southern Brittany, France. His general technical area concerns both theoretical and practical aspects, and both algorithm development for digital baseband components and corresponding hardware/software implementations and digital circuit design. His research activities target mainly digital communication applications, in addition to other application domains, and more particularly the design of flexible digital physical layer for future wireless communication standards and terminals. Prof. Baghdadi is IEEE Senior Member. He serves on the technical program committee for several international conferences. He co-authored more than 100 papers on scientific journals and proceedings of international conferences.

Publications

vianney-lapotre
Image document

An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture

Vianney Lapotre , Hübner Michael , Guy Gogniat , Purushotham Murugappa Velayuthan , Amer Baghdadi
ReCoSoC 2013 : 8th IEEE International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Jul 2013, Darmstadt, Germany. ⟨10.1109/ReCoSoC.2013.6581518⟩
Communication dans un congrès hal-00873978v1
Image document

Stopping-free dynamic configuration of a multi-ASIP turbo decoder

Vianney Lapotre , Purushotham Murugappa Velayuthan , Guy Gogniat , Amer Baghdadi , Michael Hubner
DSD 2013 : 16th Euromicro Conference on Digital System Design, Sep 2013, Santander, Spain. pp.155 - 162
Communication dans un congrès hal-00876005v1
Image document

Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder

Vianney Lapotre , Purushotham Murugappa Velayuthan , Guy Gogniat , Amer Baghdadi , Jean-Philippe Diguet
ISCAS 2013 : IEEE International Symposium on Circuits and Systems, May 2013, Beijing, Chine. pp.493 - 496, ⟨10.1109/ISCAS.2013.6571888⟩
Communication dans un congrès hal-00873979v1
Image document

Plateforme multi-ASIP reconfigurable dynamiquement pour le turbo décodage dans un contexte multi-standard

Vianney Lapotre , Purushotham Murugappa Velayuthan , Guy Gogniat , Amer Baghdadi , Jean-Philippe Diguet
GRETSI 2013 : 24ème colloque du Groupement de Recherche en Traitement du Signal et des Images, Sep 2013, Brest, France
Communication dans un congrès hal-00876009v1

Rapid Design and Prototyping of a Reconfigurable Decoder Architecture for QC-LDPC Codes

Purushotham Murugappa Velayuthan , Vianney Lapotre , Amer Baghdadi , Michel Jezequel
RSP 2013 : 24th IEEE International Symposium on Rapid System Prototyping, Oct 2013, Montreal, Canada
Communication dans un congrès hal-00876088v1
Image document

A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIP

Vianney Lapotre , Purushotham Murugappa Velayuthan , Guy Gogniat , Amer Baghdadi , Jean-Philippe Diguet
ISVLSI 2013 : IEEE Computer Society Annual Symposium on VLSI, Aug 2013, Natal, Brazil. ⟨10.1109/ISVLSI.2013.6654620⟩
Communication dans un congrès hal-01002828v1
Image document

An analytical approach for sizing of heterogeneous multiprocessor flexible platform for iterative demapping and channel decoding

Vianney Lapotre , Guy Gogniat , Jean-Philippe Diguet , Salim Haddad , Amer Baghdadi
International Conference on ReConFigurable Computing and FPGAs (Reconfig), Dec 2012, Cancun, Mexico. ⟨10.1109/ReConFig.2012.6416728⟩
Communication dans un congrès hal-00747714v1
Image document

Management of reconfigurable multi-standards ASIP-based receiver

Vianney Lapotre , Guy Gogniat , Amer Baghdadi , Salim Haddad , Jean-Philippe Diguet
SOC-SIP : colloque national du groupe de recherches System On Chip - System In Package, Jun 2011, Lyon, France
Communication dans un congrès hal-00724998v1
Image document

Efficient dynamic configuration of a multi-ASIP turbo decoder

Vianney Lapotre , Purushotham Murugappa Velayuthan , Guy Gogniat , Amer Baghdadi , Jean-Noël Bazin
GDR SoC-SiP 2013 : Colloque National du Groupe de Recherche System on Chip -System in Package, Jun 2013, Lyon, France
Poster de conférence hal-00876017v1