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Amer BAGHDADI
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Documents
Identifiants chercheurs
amer-baghdadi-
0000-0002-6181-6500
- IdRef : 067318398
Présentation
**Amer Baghdadi** is a Professor at IMT Atlantique. He received his Engineering degree in 1998, Master of Science degree in the same year and PhD degree in 2002, all from Grenoble INP (Institut National Polytechnique), France. Furthermore, he received the accreditation to supervise research (HDR) in Sciences and Technologies of Information and Communication in 2012 from the University of Southern Brittany, France.
His general technical area concerns both theoretical and practical aspects, and both algorithm development for digital baseband components and corresponding hardware/software implementations and digital circuit design. His research activities target mainly digital communication applications, in addition to other application domains, and more particularly the design of flexible digital physical layer for future wireless communication standards and terminals. Prof. Baghdadi is IEEE Senior Member. He serves on the technical program committee for several international conferences. He co-authored more than 100 papers on scientific journals and proceedings of international conferences.
Publications
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Marine Objects Detection Using Deep Learning on Embedded Edge DevicesRSP 2022: IEEE International Workshop on Rapid System Prototyping, part of Embedded Systems Week (ESWEEK), Oct 2022, Shanghai (virtual), China. ⟨10.1109/RSP57251.2022.10039025⟩
Communication dans un congrès
hal-03836444v1
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Optimization of Deep-Learning Detection of Humans in Marine Environment on Edge DevicesICECS 2022: IEEE International Conference on Electronics Circuits and Systems, Oct 2022, Glasgow, United Kingdom. ⟨10.1109/ICECS202256217.2022.9970780⟩
Communication dans un congrès
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Enhancing embedded AI-based object detection using multi-view approachRSP 2022: IEEE International Workshop on Rapid System Prototyping, part of Embedded Systems Week (ESWEEK), Oct 2022, Shanghai, China. ⟨10.1109/RSP57251.2022.10039026⟩
Communication dans un congrès
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Memristor Overwrite Logic (MOL) for In-Memory DNNISCAS 2020 : IEEE International Symposium on Circuits and Systems, Oct 2020, Seville, Spain. ⟨10.1109/ISCAS45731.2020.9180549⟩
Communication dans un congrès
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Crossbar Memory Architecture Performing Memristor Overwrite Logic2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2019, Genoa, Italy. pp.723-726, ⟨10.1109/ICECS46596.2019.8964910⟩
Communication dans un congrès
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MRL Crossbar-Based Full Adder Design2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2019, Genoa, Italy. pp.674-677, ⟨10.1109/ICECS46596.2019.8964702⟩
Communication dans un congrès
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NoC-MRAM Architecture for Memory-Based Computing: database-search case studyNEWCAS 2017 : 15th IEEE International New Circuits and Systems Conference, Jun 2017, Strasbourg, France. ⟨10.1109/NEWCAS.2017.8010167⟩
Communication dans un congrès
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An analytical approach for sizing of heterogeneous multiprocessor flexible platform for iterative demapping and channel decodingInternational Conference on ReConFigurable Computing and FPGAs (Reconfig), Dec 2012, Cancun, Mexico. ⟨10.1109/ReConFig.2012.6416728⟩
Communication dans un congrès
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Efficient dynamic configuration of a multi-ASIP turbo decoderGDR SoC-SiP 2013 : Colloque National du Groupe de Recherche System on Chip -System in Package, Jun 2013, Lyon, France
Poster de conférence
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