Researcher identifiers

  • IdHAL : alban-bourge

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Number of documents

14

Alban Bourge – R&D Engineer


Current project

I currently work as a R&D ingineer at Atos. I develop hardware accelerators for FPGAs.

Past Research

I was post-doctorate researcher in the SLS team of TIMA laboratory. I worked under the supervision of Frédéric Pétrot on ternary neural networks. More precisely, we designed special architecture for hardware acceleration that has state of the art characteristics for area, power consumption, throughput and accuracy.

I obtained my PhD in TIMA laboratory, Grenoble, France in november, 2016. The topic is about context-switching hardware tasks running on FPGAs. For this purpose, I developed a plugin named CP3 (available here) for an HLS tool named AUGH (see here for more information). A platform named VALZY, presented in conference, demontrates the validity of the flow. I worked under the supervision of Olivier Muller and Frédéric Rousseau.

Teaching

Ensimag (2013-2016)

http://ensimag.grenoble-inp.fr/


Journal articles3 documents

  • Olivier Muller, Adrien Prost-Boucle, Alban Bourge, Frédéric Pétrot. Efficient Decompression of Binary Encoded Balanced Ternary Sequences. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2019. ⟨hal-02103214⟩
  • Adrien Prost-Boucle, Alban Bourge, Frédéric Pétrot. High-Efficiency Convolutional Ternary Neural Networks with Custom Adder Trees and Weight Compression. ACM Transactions on Reconfigurable Technology and Systems (TRETS), ACM, 2018, Special Issue on Deep learning on FPGAs, 11 (3), pp.1-24. ⟨10.1145/3294768⟩. ⟨hal-01686718v2⟩
  • Alban Bourge, Olivier Muller, Frédéric Rousseau. Generating Efficient Context-Switch Capable Circuits Through Autonomous Design Flow. ACM Transactions on Reconfigurable Technology and Systems (TRETS), ACM, 2016, 10 (1), pp.9. ⟨10.1145/2996199⟩. ⟨hal-01367798v2⟩

Theses1 document

  • Alban Bourge. Changement de contexte matériel sur FPGA entre équipements reconfigurables et hétérogènes dans un environnement de calcul distribué.. Architectures Matérielles [cs.AR]. Université Grenoble - Alpes, 2016. Français. ⟨tel-01474177⟩

Conference papers10 documents

  • Arief Wicaksana, Alban Bourge, Olivier Muller, Arif Sasongko, Frédéric Rousseau. Prototyping dynamic task migration on heterogeneous reconfigurable systems. International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, Oct 2017, Seoul, South Korea. ⟨hal-01971312⟩
  • Adrien Prost-Boucle, Alban Bourge, Frédéric Pétrot, Hande Alemdar, Nicholas Caldwell, et al.. Scalable High-Performance Architecture for Convolutional Ternary Neural Networks on FPGA. Field Programmable Logic and Applications (FPL), 2017 27th International Conference on, Sep 2017, Gent, Belgium. ⟨hal-01563763⟩
  • Simon Pontie, Alban Bourge, Adrien Prost-Boucle, Paolo Maistri, Olivier Muller, et al.. HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic. 2016 Euromicro Conference on Digital System Design (DSD), 2016, Limassol, Cyprus. pp.511-518, ⟨10.1109/DSD.2016.51⟩. ⟨hal-01389247⟩
  • Alban Bourge, Olivier Muller, Frédéric Rousseau. Flot de conception automatique pour circuits commutables. Conférence d’informatique en Parallélisme, Architecture et Système (COMPAS 2016), Jul 2016, Lorient, France. ⟨hal-01353512⟩
  • Alban Bourge, Olivier Muller, Frédéric Rousseau. La synthèse de haut niveau au service du changement de contexte matériel. . Colloque National GDR SoC-SiP, 2016, Nantes, France. ⟨hal-01353497⟩
  • Arief Wicaksana, Alban Bourge, Olivier Muller, Frédéric Rousseau. Demonstration of a context-switch method for heterogeneous reconfigurable systems. 2016 26th International Conference on Field Programmable Logic and Applications (FPL), Aug 2016, Lausanne, Switzerland. pp.1 - 1, ⟨10.1109/FPL.2016.7577384⟩. ⟨hal-01398560⟩
  • Alban Bourge, Olivier Muller, Frédéric Rousseau. Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems. Field-Programmable Custom Computing Machines (FCCM'15), May 2015, Vancouver, Canada. ⟨hal-01164923⟩
  • Alban Bourge, Olivier Muller, Frédéric Rousseau. A Novel Method for Enabling FPGA Context-Switch (Abstract Only). Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015, Monterey, CA, USA, United States. pp.261--261, ⟨10.1145/2684746.2689096⟩. ⟨hal-01353496⟩
  • Alban Bourge, Alexandre Ghiti, Olivier Muller, Frédéric Rousseau. Méthode de sélection de checkpoint matériel avec outil de synthèse de haut niveau. Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM'14), May 2014, Lille, France. pp.4. ⟨hal-01089685⟩
  • Tristan Groleat, Matthieu Arzel, Sandrine Vaton, Alban Bourge, Yannick Le Balch, et al.. Flexible, extensible, open-source and affordable FPGA-based traffic generator. HPDC 2013 : 22nd International ACM Symposium on High Performance Parallel and Distributed Computing, Jun 2013, New-York, United States. ⟨hal-00859291⟩