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87 résultats
A Constructive Solution to the Juggling Problem in Processor Array SynthesisProceedings of the International Parallel and Distributed Processing Symposium (IPDPS 2000), 2000, Cancun, Mexico
Communication dans un congrès
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Plugging anti and output dependence removal techniques into loop parallelization algorithmsParallel Computing, 1997, 23 (1-2), pp.251-266. ⟨10.1016/S0167-8191(96)00108-1⟩
Article dans une revue
hal-00856884v1
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Formal methods for solving the algebraic path problemApplication-driven architecture synthesis, 1993, Unknown, pp.47-69
Communication dans un congrès
hal-00857078v1
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Evaluating array expressions on massively parallel machines with communication/computation overlapParallel Processing: CONPAR94 - VAPP VI, 1994, Unknown, pp.713-724
Communication dans un congrès
hal-00857085v1
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Special issue on Compilers for parallel computersA. Darte and Y. Robert and G.A. Silber. Parallel Processing Letters, 10, pp.151-250, 2000
Ouvrages
hal-00856644v1
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Loop parallelization algorithms: from parallelism extraction to code generation[Research Report] 97--17, 1997
Rapport
hal-00856896v1
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Bee+Cl@k: An Implementation of Lattice-Based Array Contraction in the Source-to-Source Translator ROSEACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), Jun 2007, San Diego, United States. ⟨10.1145/1273444.1254778⟩
Communication dans un congrès
hal-03106126v1
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Rank: a tool to check program termination and computational complexityConstraints in Software Testing Verification and Analysis, Mar 2013, Luxembourg
Communication dans un congrès
hal-00801571v1
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Exact and Approximated Data-Reuse Optimizations for Tiling with Parametric Sizes24th International Conference on Compiler Construction (CC'15), part of ETAPS'15, Apr 2015, London, United Kingdom
Communication dans un congrès
hal-01099017v1
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Evaluating array expressions on massively parallel machines with communication/computation overlapInternational Journal of Supercomputer Applications and High Performance Computing, 1995, 9 (3), pp.205-219
Article dans une revue
inria-00564991v1
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Improvements to Conservative and Optimistic Register CoalescingProceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, 2008, pp.147-156. ⟨10.1145/1450095.1450119⟩
Article dans une revue
ensl-00179685v1
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SSI Properties RevisitedACM Transactions on Embedded Computing Systems (TECS), 2012, 11S (1), ⟨10.1145/2180887.2180898⟩
Article dans une revue
hal-00761505v1
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Program Termination and Worst Time Complexity with Multi-Dimensional Affine Ranking Functions[Research Report] 2009, pp.31
Rapport
inria-00434037v1
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A characterization of one-to-one modular mappingsParallel Processing Letters, 1996, 5, pp.145-157
Article dans une revue
hal-00856914v1
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On the optimality of Allen and Kennedy's algorithm for parallelism extraction in nested loops[Research Report] 96-05, 1996
Rapport
hal-00856922v1
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Synthesizing systolic algorithms: some recent developmentsApplication Specific Array Processors 91, 1991, Unknown, pp.373-386
Communication dans un congrès
hal-00857053v1
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Mapping uniform loop nests onto distributed memory architecturesParallel Computing, 1994, 20, pp.679-710
Article dans une revue
hal-00857082v1
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Polyhedral Optimizations? Not Even Scared!Jornadas Sarteco, Arturo González Escribano; Diego R. Llanos Ferraris, Sep 2014, Valladolid, Spain
Communication dans un congrès
hal-01099290v1
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Liveness Analysis in Explicitly-Parallel Programs[Research Report] RR-8839, CNRS; Inria; ENS Lyon. 2016, pp.25
Rapport
hal-01251579v1
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Optimizing Remote Accesses for Offloaded Kernels: Application to High-Level Synthesis for FPGADesign, Automation, and Test in Europe (DATE'13), Mar 2013, Grenoble, France
Communication dans un congrès
hal-00761533v1
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Revisiting Out-of-SSA Translation for Correctness, Code Quality, and Efficiency[Research Report] 2008, pp.14
Rapport
inria-00349925v3
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Kernel Offloading with Optimized Remote Accesses[Research Report] RR-7697, INRIA. 2011, pp.29
Rapport
inria-00611179v1
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Computing Liveness Sets for SSA-Form Programs[Research Report] RR-7503, INRIA. 2011, pp.25
Rapport
inria-00558509v2
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Circuit retiming applied to decomposed software pipeliningIEEE Transactions on Parallel and Distributed Systems, 1998, 9 (1), pp.24-35. ⟨10.1109/71.655240⟩
Article dans une revue
hal-00856850v1
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Affine-by-statement scheduling of uniform and affine loop nests over parametric domainsJournal of Parallel and Distributed Computing, 1995, 29, pp.43-59
Article dans une revue
hal-00857091v1
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Heuristics for the evaluation of array expressions on state-of-the-art massively parallel machinesAlgorithms and Parallel VLSI Architectures III, 1995, Unknown, pp.319-330
Communication dans un congrès
hal-00857100v1
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A New Guaranteed Heuristic for the Software Pipelining Problem[Research Report] RR-2759, INRIA. 1995
Rapport
inria-00073933v1
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Studying Optimal Spilling in the Light of SSAACM Transactions on Architecture and Code Optimization, 2015, 11-4 (47), pp.26. ⟨10.1145/2685392⟩
Article dans une revue
hal-01099016v1
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Lattice-Based Array Contraction: From Theory to Practice[Research Report] LIP RR-2007-44, LIP - Laboratoire de l’Informatique du Parallélisme. 2007
Rapport
hal-02127064v1
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Linear scheduling is nearly optimalParallel Processing Letters, 1991, 1 (2), pp.73-81
Article dans une revue
hal-00857050v1
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