Abdoulaye Gamatié
9
Documents
Présentation
**Biography:** Abdoulaye Gamatié is currently a CNRS Senior Researcher (Directeur de Recherche [CNRS](http://www.cnrs.fr/index.php)) in the Microelectronics department of the [LIRMM](http://www.lirmm.fr/lirmm_eng) laboratory (Montpellier - France). His research activity focuses on the design of energy-efficient multicore/multiprocessor architectures for embedded and high-performance computing. He is the scientific leader of the French ANR project [CONTINUUM](http://www.lirmm.fr/continuum-project). He co-authored more than 50 articles in refereed journals and international conferences. He is the author of a [reference book](http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4419-0940-4) on synchronous programming of embedded applications using the Signal language. He also contributed to several books as editor and chapter author. He is currently Associate Editor of ACM Transactions on Embedded Computing Systems (ACM TECS). He received his Habilitation (HDR in French) and Ph.D. in Computer Science, respectively in 2012 from Université de Lille 1 and in 2004 from Université de Rennes 1. He was previously member of [LIFL](http://www.lifl.fr/)computer science laboratory (Villeneuve D'Ascq - France) and [Inria](http://www.inria.fr/index.en.html) Lille - Nord Europe research center (France) from 2006 to 2012. Before this period, he had been member of [IRISA](http://www.irisa.fr/en) computer science laboratory (Rennes - France) where he worked on multi-clock synchronous design and analysis of real-time embedded systems in the avionics domain from 1999 to 2005.
Publications
- 2
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 9
- 9
- 4
- 4
- 4
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 9
- 1
- 1
- 1
- 1
- 3
- 4
- 4
|
A Bottom-Up Methodology for the Fast Assessment of CNN Mappings on Energy-Efficient AcceleratorsJournal of Low Power Electronics and Applications, 2023, 13 (1), pp.5. ⟨10.3390/jlpea13010005⟩
Article dans une revue
lirmm-03939495v1
|
|
Towards Energy-Efficient Heterogeneous Multicore Architectures for Edge ComputingIEEE Access, 2019, 7, pp.49474-49491. ⟨10.1109/ACCESS.2019.2910932⟩
Article dans une revue
lirmm-02099306v1
|
|
Highly-Adaptive Mixed-Precision MAC Unit for Smart and Low-Power Edge ComputingNEWCAS 2021 - 19th IEEE International New Circuits and Systems Conference, Jun 2021, Toulon (virtual), France. pp.1-4, ⟨10.1109/NEWCAS50681.2021.9462745⟩
Communication dans un congrès
lirmm-03241639v1
|
|
Évaluation de deux architectures matérielles dédiées à l'inférence basée sur des réseaux de neurones convolutifsComPAS 2020 - Conférence en Parallélisme, Architecture et Système, Jun 2020, Lyon, France
Communication dans un congrès
lirmm-03041267v2
|
|
Energy-Efficient Machine Learning on FPGA for Edge Devices: a Case StudyComPAS 2020 - Conférence en Parallélisme, Architecture et Système, Jun 2020, Lyon, France
Communication dans un congrès
lirmm-03041276v2
|
|
Automatic Energy-Efficiency Monitoring of OpenMP WorkloadsReCoSoC 2019 - 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, Jul 2019, York, United Kingdom. pp.43-50, ⟨10.1109/ReCoSoC48741.2019.9034988⟩
Communication dans un congrès
lirmm-02183901v1
|
|
Deliverable D5.2 – Performance and power consumption evaluation of compute node[Research Report] Cortus S.A.S; LIRMM (UM, CNRS). 2020
Rapport
lirmm-03168364v1
|
|
Deliverable D4.2 – Preliminary design specifications of the adaptive compute node[Research Report] Cortus S.A.S; LIRMM (UM, CNRS). 2019
Rapport
lirmm-03168361v1
|
|
Deliverable D5.1 – Technical description of the holistic design flow in CONTINUUM[Research Report] Inria Rennes – Bretagne Atlantique; LIRMM (UM, CNRS); Cortus S.A.S. 2019
Rapport
lirmm-03168363v1
|