Abdoulaye Gamatié
9
Documents
Présentation
**Biography:** Abdoulaye Gamatié is currently a CNRS Senior Researcher (Directeur de Recherche [CNRS](http://www.cnrs.fr/index.php)) in the Microelectronics department of the [LIRMM](http://www.lirmm.fr/lirmm_eng) laboratory (Montpellier - France). His research activity focuses on the design of energy-efficient multicore/multiprocessor architectures for embedded and high-performance computing. He is the scientific leader of the French ANR project [CONTINUUM](http://www.lirmm.fr/continuum-project). He co-authored more than 50 articles in refereed journals and international conferences. He is the author of a [reference book](http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4419-0940-4) on synchronous programming of embedded applications using the Signal language. He also contributed to several books as editor and chapter author. He is currently Associate Editor of ACM Transactions on Embedded Computing Systems (ACM TECS). He received his Habilitation (HDR in French) and Ph.D. in Computer Science, respectively in 2012 from Université de Lille 1 and in 2004 from Université de Rennes 1. He was previously member of [LIFL](http://www.lifl.fr/)computer science laboratory (Villeneuve D'Ascq - France) and [Inria](http://www.inria.fr/index.en.html) Lille - Nord Europe research center (France) from 2006 to 2012. Before this period, he had been member of [IRISA](http://www.irisa.fr/en) computer science laboratory (Rennes - France) where he worked on multi-clock synchronous design and analysis of real-time embedded systems in the avionics domain from 1999 to 2005.
Publications
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 9
- 9
- 3
- 2
- 2
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 9
- 1
- 2
- 4
- 1
- 2
- 1
- 1
Exploration of a scalable and power-efficient asynchronous Network-on-Chip with dynamic resource allocationMicroprocessors and Microsystems: Embedded Hardware Design , 2018, 60, pp.173-184. ⟨10.1016/j.micpro.2018.05.003⟩
Article dans une revue
lirmm-01912679v1
|
Distributed and Dynamic Shared-Buffer Router for High-Performance InterconnectNOCS: Networks-on-Chip Symposium, Oct 2017, Seoul, South Korea. pp.1-8, ⟨10.1145/3130218.3130223⟩
Communication dans un congrès
lirmm-01622889v1
|
|
Roundabout: A Network-on-Chip router with adaptive buffer sharingNEWCAS 2017 - 15th IEEE International New Circuits and Systems Conference, Jun 2017, Strasbourg, France. pp.65-68, ⟨10.1109/NEWCAS.2017.8010106⟩
Communication dans un congrès
lirmm-01622878v1
|
|
Scalable and Power-Efficient Implementation of an Asynchronous Router with Buffer SharingDSD 2017 - 20th Euromicro Conference on Digital System Design, Aug 2017, Vienna, Australia. pp.171-178, ⟨10.1109/DSD.2017.55⟩
Communication dans un congrès
lirmm-01622885v1
|
|
Design space exploration for complex automotive applications: an engine control system case studyRAPIDO: Rapid Simulation and Performance Evaluation, Jan 2016, Prague, Czech Republic. ⟨10.1145/2852339.2852341⟩
Communication dans un congrès
lirmm-01265891v1
|
|
|
An Integrated Framework for Model-Based Design and Analysis of Automotive Multi-Core SystemsFDL: Forum on specification & Design Languages, Sep 2015, Barcelona, Spain
Communication dans un congrès
lirmm-01418748v1
|
On the Performance Exploration of 3D NoCs with Resistive-Open TSVsISVLSI 2015 - International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.579-584, ⟨10.1109/ISVLSI.2015.49⟩
Communication dans un congrès
lirmm-01248588v1
|
|
Design Exploration Framework for 3D-NoC Multicore Systems under Process Variability at RTL level[Research Report] LIRMM (UM, CNRS). 2018
Rapport
lirmm-01870671v1
|
|
Deliverable D3.2 - Evaluation of selected memory and communication technologies and exploitation opportunities in compilation and runtime management[Research Report] LIRMM (UM, CNRS); Inria Rennes – Bretagne Atlantique. 2017
Rapport
lirmm-03168318v1
|