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Cost-Efficient Buffer Sizing in Shared-Memory 3D-MPSoCs Using Wide I/O Interfaces

 Frédéric Pétrot , S. Foroutan , H. Sheibanyrad
5th Design for 3D Silicon Integration Workshop, Jun 2013, Grenoble, France
Communication dans un congrès hal-01059162v1

Assignment of Vertical Links to Routers in Vertically-Partially-Connected 3D-NoCs

 Sahar Foroutan , Abbas Sheibanyrad , Frédéric Pétrot
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2014, 33 (8), pp.1208-1218. ⟨10.1109/TCAD.2014.2323219⟩
Article dans une revue hal-01195897v1

Hybrid-Timing FIFOs to use on Networks-on-Chip in GALS Architectures

 Abbas Sheibanyrad , Alain Greiner
ESA International Conference on Embedded Systems and Applications, Jun 2007, Las Vegas, Nevada, United States. pp.27-33
Communication dans un congrès hal-01311526v1

3D Integration for NoC-based SoC Architectures

 A. Sheibanyrad , Frédéric Pétrot , A. Jantsch
Springer, pp.278, 2011, ⟨10.1007/978-1-4419-7618-5⟩
Ouvrages hal-00564660v1

Multisynchronous and Fully Asynchronous NoCs for GALS Architectures

 Abbas Sheibanyrad , Alain Greiner , Ivan Miro-Panades
IEEE Design & Test, 2008, 25 (6), pp.572-580. ⟨10.1109/MDT.2008.167⟩
Article dans une revue hal-00367212v1

Network-on-Chip Performance Evaluation Using an Analytical Method

 S. Foroutan , H. Sheibanyrad , Frédéric Pétrot
Multicore Technology: Architecture, Reconfiguration, and Modeling, crc press, pp.353-407, 2013, 9781439880630
Chapitre d'ouvrage hal-01491667v1

Systematic Comparison between the Asynchronous and the Multi-Synchronous Implementations of a Network on Chip Architecture

 Abbas Sheibanyrad , Ivan Miro Panades , Alain Greiner
DATE Design Automation and Test in Europe Conference 2007, Apr 2007, Nice, France. pp.1090-1095, ⟨10.1109/DATE.2007.364439⟩
Communication dans un congrès hal-01311482v1

A Low Cost Network-on-Chip with Guaranteed Service Well Suited to the GALS Approach

 Ivan Miro Panades , Alain Greiner , Abbas Sheibanyrad
NanoNet International Conference on Nano-Networks, Sep 2006, Lausanne, Switzerland. pp.1-5, ⟨10.1109/NANONET.2006.346219⟩
Communication dans un congrès hal-01338441v1

A Distributed NUCA Architecture Using an Efficient NoC Multicasting Support

 Hela Bel Hadj Amor , Abbas Sheibanyrad , Frédéric Pétrot
Euromicro Conference on Digital System Design (DSD 2017), Aug 2017, Vienne, Austria. pp.184-191, ⟨10.1109/DSD.2017.34⟩
Communication dans un congrès hal-01701072v1

Elevator-First: A Deadlock-Free Distributed Routing Algorithm for Vertically Partially Connected 3D-NoCs

 F. Dubois , H. Sheibanyrad , Frédéric Pétrot , M. Bahmani
IEEE Transactions on Computers, 2013, 62 (3), pp.609-615. ⟨10.1109/TC.2011.239⟩
Article dans une revue hal-01138285v1

Architecture de communication à base de sérialiseur asynchrone entre circuits déposés sur des substrats de silicium empilés

 Frédéric Pétrot , A. Sheibanyrad
France, Patent n° : 09/53637. 2009
Brevet hal-00578021v1

Cost-efficient buffer sizing in shared-memory 3D-MPSoCs using wide I/O interfaces

 S. Foroutan , H. Sheibanyrad , Frédéric Pétrot
The Design Automation Conference (DAC), Jun 2012, San Francisco, United States. pp.366-375, ⟨10.1145/2228360.2228427⟩
Communication dans un congrès hal-00815811v1

A 3D-NoC Router Implementation Exploiting Vertically-Partially-Connected Topologies

 M. Bahmani , H. Sheibanyrad , Frédéric Pétrot , F. Dubois , P. Durante
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'12), Aug 2012, Amherst, United States. pp.9-14, ⟨10.1109/ISVLSI.2012.19⟩
Communication dans un congrès hal-00745456v1

Abstract Description of System Application and Hardware Architecture for Hardware/Software Code Generation

 A. El Mrabti , A. Sheibanyrad , Frédéric Rousseau , Frédéric Pétrot , R. Lemaire , et al.
12th Euromicro Conference on Digital System Design (DSD'09), August 27-29, Aug 2009, Patras, Greece. pp.567 - 574
Communication dans un congrès hal-00421677v1

Synthesis of dependency-aware traffic generators from NoC simulation traces

 Otavio Alcantara de Lima , Virginie Fresse , Frédéric Rousseau , Abbas Sheibanyrad
Journal of Systems Architecture, 2016, 71, pp.102-113. ⟨10.1016/j.sysarc.2016.10.004⟩
Article dans une revue hal-01440182v1

Two Efficient Synchronous ⇔ Asynchronous Converters well-suited for Networks-on-Chip in GALS Architectures

 Abbas Sheibanyrad , Alain Greiner
Integration, the VLSI Journal, 2008, 41 (1), pp.17-26. ⟨10.1016/j.vlsi.2007.04.006⟩
Article dans une revue istex hal-01199004v1

Two Efficient Synchronous ⇔ Asynchronous Converters Well-Suited for Network on Chip in GALS Architectures

 Abbas Sheibanyrad , Alain Greiner
International Workshop on Power And Timing Modeling Optimization and Simulation, Sep 2006, Montpellier, France. pp.192-202, ⟨10.1007/11847083_19⟩
Communication dans un congrès istex hal-01338438v1

Micro-réseau sur puce compatible avec l'approche GALS

 Ivan Miro Panades , Alain Greiner , Abbas Sheibanyrad
Journées Nationales du Réseau Doctoral de Micro-électronique, May 2006, Rennes, France. pp.1-5
Communication dans un congrès hal-01338238v1

A 4 x 4 x 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links

 Pascal Vivet , Yvain Thonnart , Romain Lemaire , Cristiano Santos , Edith Beigné , et al.
IEEE Journal of Solid-State Circuits, 2016, 52 (1), pp.33 - 49. ⟨10.1109/JSSC.2016.2611497⟩
Article dans une revue hal-01447433v1

A Meta-Routing Method to Create Multiple Virtual Logical Networks on a Single Hardware NoC

 Hela Bel Hadj Amor , Abbas Sheibanyrad , Frédéric Pétrot
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul 2017, Bochum, Germany. pp.200-205, ⟨10.1109/ISVLSI.2017.43⟩
Communication dans un congrès hal-01570786v1

Physical Implementation of an Asynchronous 3D-NoC Router Using Serial Vertical Links

 F. Darve , H. Sheibanyrad , Pascal Vivet , Frédéric Pétrot
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'11), 4-6 July, Jul 2011, Chennai, Tamil Nadu, India. pp.25 - 30, ⟨10.1109/ISVLSI.2011.59⟩
Communication dans un congrès hal-00680437v1

Asynchronous 3D-NoCs Making Use of Serialized Vertical Links

 A. Sheibanyrad , Frédéric Pétrot
Hamed Sheibanyrad, Frédéric Pétrot and Axel Jantsch. 3D Integration for NoC-based SoC Architectures, Springer, pp.149-165, 2011, Integrated Circuits and Systems, Part 3, ⟨10.1007/978-1-4419-7618-5_7⟩
Chapitre d'ouvrage istex hal-00564627v1
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