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142 résultats
Energy-Awareness and Performance Management with Parallel Dataflow ApplicationsJournal of Signal Processing Systems, 2017, 87 (1), pp.33-48. ⟨10.1007/s11265-015-1059-4⟩
Article dans une revue
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HEVC Decoding with Tunable Image Quality - Power saving and complexity reduction2015
Autre publication scientifique
hal-01119961v1
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Scalable HEVC decoder for mobile devices: Trade-off between energy consumption and quality2016 Conference on Design and Architectures for Signal and Image Processing, DASIP 2016, Oct 2016, Rennes, France. pp.18--25, ⟨10.1109/DASIP.2016.7853791⟩
Communication dans un congrès
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PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCsACM Transactions on Modeling and Performance Evaluation of Computing Systems, 2021, 6 (4), pp.1-30. ⟨10.1145/3513003⟩
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hal-03657155v1
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Prototypage Rapide et Génération de Code pour DSP Multi-Coeurs Appliqués à la Couche Physique des Stations de Base 3GPP LTERéseaux et télécommunications [cs.NI]. INSA de Rennes, 2010. Français. ⟨NNT : 2010ISAR0011⟩
Thèse
tel-00578043v1
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From AVC Decoder to SVC: Minor Impact on a Dataflow Graph DescriptionPicture Coding Symposium (PCS 2007), Nov 2007, France. pp.1067
Communication dans un congrès
hal-00180103v1
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Demo GPStudio: a toolchain for FPGA-based Smart Cameras: Demo PaperProceedings of the 10th International Conference on Distributed Smart Camera, 2016, Unknown, Unknown Region. pp.214--215
Communication dans un congrès
hal-01626469v1
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An Open Framework for Rapid Prototyping of Signal Processing ApplicationsEURASIP Journal on Embedded Systems, 2009, vol 2009, pp14
Article dans une revue
hal-00429312v1
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Off-line DVFS integration in MDE-based design space exploration framework for MP2SoC systems25th IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, WETICE 2016, Jun 2016, Paris, France. pp.160--165, ⟨10.1109/WETICE.2016.43⟩
Communication dans un congrès
hal-01368137v1
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On Memory Reuse Between Inputs and Outputs of Dataflow ActorsACM Transactions on Embedded Computing Systems (TECS), 2016, 15 (2), pp.30. ⟨10.1145/2871744⟩
Article dans une revue
hal-01284333v1
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Efficient Multicore Implementation of An Advanced Generator of Discrete Chaotic SequencesChaos-Information Hiding and Security (CIHS), International Workshop on, Dec 2014, London, United Kingdom
Communication dans un congrès
hal-01094677v1
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Buffer Merging Technique for Minimizing Memory Footprints of Synchronous Dataflow SpecificationsInternational Conference on Acoustics, Speech and Signal Processing (ICASSP), Apr 2015, Brisbane, Australia. pp.1111-1115, ⟨10.1109/icassp.2015.7178142⟩
Communication dans un congrès
hal-01146340v1
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Imbalanced Classification with TPG Genetic Programming: Impact of Problem Imbalance and Selection MechanismsGECCO 2022 - Genetic and Evolutionary Computation Conference, Jul 2022, Boston, United States. pp.1-4, ⟨10.1145/3520304.3529008⟩
Communication dans un congrès
hal-03699228v2
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Analysis of a heterogeneous multi-core, multi-hw-accelerator-based system designed using PREESM and SDSoC12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip, ReCoSoC 2017, Jul 2017, Madrid, Spain. ⟨10.1109/ReCoSoC.2017.8016151⟩
Communication dans un congrès
hal-01622393v1
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Physical Layer Multi-Core Prototyping: A Dataflow-Based Approach for LTE eNodeBSpringer-Verlag London, pp.224, 2012, Lecture Notes in Electrical Engineering, 978-1-4471-4209-6. ⟨10.1007/978-1-4471-4210-2⟩
Ouvrages
hal-00739957v1
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Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing TechnologiesJournal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 2016
Article dans une revue
hal-01415970v1
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Automatic CNN Model Partitioning for GPU/FPGA-based Embedded Heterogeneous Accelerators using Geometric ProgrammingJournal of Signal Processing Systems, 2023, 95, pp.1203-1218. ⟨10.1007/s11265-023-01898-0⟩
Article dans une revue
hal-04289176v1
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Algorithmic-level Approximate Computing Applied to Energy Efficient HEVC DecodingIEEE Transactions on Emerging Topics in Computing, 2019, 7 (1), pp.5-17. ⟨10.1109/TETC.2016.2593644⟩
Article dans une revue
hal-01354638v1
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Optimization of automatically generated multi-core code for the LTE RACH-PD algorithmDASIP 2008, Nov 2008, Bruxelles, Belgium
Communication dans un congrès
hal-00336477v1
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A model of architecture for estimating GPU processing performance and powerDesign Automation for Embedded Systems, 2021, 25 (1), pp.43-63. ⟨10.1007/s10617-020-09244-4⟩
Article dans une revue
hal-03156001v1
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Scalable HEVC Decoder for Mobile Devices: Trade-offs between Energy Consumption and QualityConference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2016, Rennes, France
Communication dans un congrès
hal-01415938v1
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On predicting the HEVC intra quad-tree partitioning with tunable energy and rate-distortionJournal of Real-Time Image Processing, 2019, 16 (1), pp.161-174. ⟨10.1007/s11554-018-0809-5⟩
Article dans une revue
hal-01929171v1
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Models of Architecture[Research Report] PREESM/2015-12TR01, 2015, IETR/INSA Rennes; Scuola Superiore Sant’Anna, Pisa; Institut Pascal, Clermont Ferrand; University of Maryland, College Park; Tampere University of Technology, Tampere. 2015
Rapport
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Modeling Nested for Loops with Explicit Parallelism in Synchronous DataFlow GraphsEmbedded Computer Systems: Architectures, Modeling, and Simulation, Jul 2019, Pythagorion, Samos Island, Greece. pp.269-280, ⟨10.1007/978-3-030-27562-4_19⟩
Communication dans un congrès
hal-02267487v2
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Accelerating CNN inference on FPGAs: A Survey2018
Pré-publication, Document de travail
hal-01695375v2
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Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC14 th IFAC INTERNATIONAL CONFERENCE on PROGRAMMABLE DEVICES and EMBEDDED SYSTEMS (PDeS), Oct 2016, Brno, Czech Republic
Communication dans un congrès
hal-01415965v1
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M14965: Implementing SVC from RVC AVC: description of the specific SVC FUs2007
Autre publication scientifique
hal-00696462v1
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M14457: A scheme for implementing MPEG-4 SP codec in the RVC framework2007
Autre publication scientifique
hal-00696464v1
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Scratchy : A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming ApplicationsDASIP 2024: Workshop on Design and Architectures for Signal and Image Processing, Jan 2024, Munich (Allemagne), Germany
Communication dans un congrès
hal-04509310v1
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PhD Forum Towards embedded heterogeneous FPGA-GPU smart camera architectures for CNN inference13th International Conference on Distributed Smart Cameras, ICDSC 2019, Sep 2019, Trento, Italy. pp.a34, ⟨10.1145/3349801.3357136⟩
Communication dans un congrès
hal-02365853v1
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