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		Scalable High-Performance Architecture for Convolutional Ternary Neural Networks on FPGA Adrien Prost-Boucle , Alban Bourge , Frédéric Pétrot , Hande Alemdar , Nicholas Caldwell , et al. Field Programmable Logic and Applications (FPL), 2017 27th International Conference on, Sep 2017, Gent, Belgium Communication dans un congrès hal-01563763v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Génération rapide d'accélerateurs matériels par synthèse d'architecture sous contraintes de ressources Adrien Prost-Boucle Micro et nanotechnologies/Microélectronique. Université de Grenoble, 2014. Français. ⟨NNT : 2014GRENT039⟩ Thèse tel-01296477v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Génération rapide d'accélérateurs matériels par synthèse d'architecture sous contraintes de ressources Adrien Prost-Boucle Sciences de l'ingénieur [physics]. Université de Grenoble, 2014. Français. ⟨NNT : ⟩ Thèse tel-01071661v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Fast and Standalone Design Space Exploration for High-Level Synthesis under Resource Constraints Adrien Prost-Boucle , Olivier Muller , Frédéric Rousseau Journal of Systems Architecture, 2014, 60 (1), pp.79-93. ⟨10.1016/j.sysarc.2013.10.002⟩ Article dans une revue hal-00914536v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Efficient and versatile FPGA acceleration of support counting for stream mining of sequences and frequent itemsets Adrien Prost-Boucle , Frédéric Pétrot , Vincent Leroy , Hande Alemdar ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2017, ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10 (3), pp.21. ⟨10.1145/3027485⟩ Article dans une revue hal-01474234v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Fast and Autonomous HLS Methodology for Hardware Accelerator Generation Under Resource Constraints Adrien Prost-Boucle , Olivier Muller , Frédéric Rousseau Euromicro Conference on Digital System Design (DSD'13), Sep 2013, Santander, Spain. pp.201 - 208, ⟨10.1109/DSD.2013.30⟩ Communication dans un congrès hal-00919969v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Automated Non-Regression Testing for Accelerator Prototyping on FPGA Arief Wicaksana , Adrien Prost-Boucle , Olivier Muller , Frédéric Rousseau International symposium on Rapid System Prototyping (RSP'16), Oct 2016, Pittsbrugh, United States. pp.45-51 Communication dans un congrès hal-01523887v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		A new automated instrumentation for emulation-based fault injection Régis Leveugle , Adrien Prost-Boucle 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS'10), Feb 2010, Iguaçu Falls, Brazil. pp.220-223 Communication dans un congrès hal-01400085v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		High-Throughput and High-Accuracy Classification with Convolutional Ternary Neural Networks Frédéric Pétrot , Adrien Prost-Boucle , Alban Bourge International Workshop on Highly Efficient Neural Processing (HENP'2018), Oct 2018, Torino, Italy Communication dans un congrès hal-01922342v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Méthodologie de génération rapide et automatique d’accélérateurs matériels sous contraintes de ressources : progression itérative et gloutonne Adrien Prost-Boucle , Olivier Muller , Frédéric Rousseau Conférence en Parallélisme, Architecture et Système (ComPAS'13), Jan 2013, Grenoble, France Communication dans un congrès hal-01408850v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic Simon Pontie , Alban Bourge , Adrien Prost-Boucle , Paolo Maistri , Olivier Muller , et al. 2016 Euromicro Conference on Digital System Design (DSD), 2016, Limassol, Cyprus. pp.511-518, ⟨10.1109/DSD.2016.51⟩ Communication dans un congrès hal-01389247v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Overview of the State of the Art in Embedded Machine Learning Liliana Lilibeth Andrade Porras , Adrien Prost-Boucle , Frédéric Pétrot Design, Automation & Test in Europe Conference & Exhibition (DATE'2018), Mar 2018, Dresden, Germany. pp.1-6 Communication dans un congrès hal-01898681v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		The 3x+1 Problem: Existence of Cycles Under Assumption of Distance Between Odd Values Adrien Prost-Boucle 2018 Pré-publication, Document de travail hal-01784043v2	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		High-Throughput Ternary CNN on FPGA: Low Level Optimizations and Compression Frédéric Pétrot , Adrien Prost-Boucle , Alban Bourge 18th International Forum on MPSoC (MPSoC'2018), Jul 2018, Snowbird, UTAH, United States Communication dans un congrès hal-01922338v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Inside the AI Accelerators: From High Performance to Energy Efficiency Ana Pinzari , Adrien Prost-Boucle , Christelle Rabache , Frédéric Pétrot Ovidiu VERMESAN - Dave MARPLES. Advancing Edge Artificial Intelligence, River Publishers, pp.87-103, 2024, 9781003478713. ⟨10.1201/9781003478713-4⟩ Chapitre d'ouvrage hal-04465853v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Efficient Decompression of Binary Encoded Balanced Ternary Sequences Olivier Muller , Adrien Prost-Boucle , Alban Bourge , Frédéric Pétrot IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 27 (8), pp.1962-1966. ⟨10.1109/tvlsi.2019.2906678⟩ Article dans une revue hal-02108549v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Hardware-friendly AI algorithms: Ternary Neural Networks Frédéric Pétrot , Adrien Prost-Boucle , Alban Bourge , Liliana Lilibeth Andrade Porras , Thomas Baumela , et al. HiPEAC Computing Systems Week (HiPEAC 2021), Oct 2021, Lyon (virtuel), France Communication dans un congrès hal-03417446v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		High-Efficiency Convolutional Ternary Neural Networks with Custom Adder Trees and Weight Compression Adrien Prost-Boucle , Alban Bourge , Frédéric Pétrot ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2018, Special Issue on Deep learning on FPGAs, 11 (3), pp.1-24. ⟨10.1145/3294768⟩ Article dans une revue hal-01686718v2	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Efficient Decompression of Binary Encoded Balanced Ternary Sequences Olivier Muller , Adrien Prost-Boucle , Alban Bourge , Frédéric Pétrot IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019 Article dans une revue hal-02103214v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Ternary Neural Networks for Resource-Efficient AI Applications Hande Alemdar , Vincent Leroy , Adrien Prost-Boucle , Frédéric Pétrot International Joint Conference on Neural Networks, May 2017, Anchorage, United States Communication dans un congrès hal-01481478v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		On-board non-regression test of HLS tools targeting FPGA Arief Wicaksana , Adrien Prost-Boucle , Olivier Muller , Frédéric Rousseau , Arif Sasongko 2016 International Symposium On Rapid System Prototyping (RSP 2016), Oct 2016, Pittsburgh, PA, United States. pp.41-47, ⟨10.1145/2990299.2990307⟩ Communication dans un congrès hal-01540944v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More
		Ternary neural networks for resource-efficient AI applications H. Alemdar , V. Leroy , Adrien Prost-Boucle , Frédéric Pétrot 2017 International Joint Conference on Neural Networks (IJCNN'17), May 2017, Anchorage, AK, United States. pp.2547-2554 Communication dans un congrès hal-01570788v1	Envoyer sur ORCID Exporter BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Export avancé Partager Gmail Facebook X LinkedIn More

Filtrer vos résultats

Scalable High-Performance Architecture for Convolutional Ternary Neural Networks on FPGA

Génération rapide d'accélerateurs matériels par synthèse d'architecture sous contraintes de ressources

Génération rapide d'accélérateurs matériels par synthèse d'architecture sous contraintes de ressources

Fast and Standalone Design Space Exploration for High-Level Synthesis under Resource Constraints

Efficient and versatile FPGA acceleration of support counting for stream mining of sequences and frequent itemsets

Fast and Autonomous HLS Methodology for Hardware Accelerator Generation Under Resource Constraints

Automated Non-Regression Testing for Accelerator Prototyping on FPGA

A new automated instrumentation for emulation-based fault injection

High-Throughput and High-Accuracy Classification with Convolutional Ternary Neural Networks

Méthodologie de génération rapide et automatique d’accélérateurs matériels sous contraintes de ressources : progression itérative et gloutonne

HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic

Overview of the State of the Art in Embedded Machine Learning

The 3x+1 Problem: Existence of Cycles Under Assumption of Distance Between Odd Values

High-Throughput Ternary CNN on FPGA: Low Level Optimizations and Compression

Inside the AI Accelerators: From High Performance to Energy Efficiency

Efficient Decompression of Binary Encoded Balanced Ternary Sequences

Hardware-friendly AI algorithms: Ternary Neural Networks

High-Efficiency Convolutional Ternary Neural Networks with Custom Adder Trees and Weight Compression

Efficient Decompression of Binary Encoded Balanced Ternary Sequences

Ternary Neural Networks for Resource-Efficient AI Applications

On-board non-regression test of HLS tools targeting FPGA

Ternary neural networks for resource-efficient AI applications